TMS320VC5421 datasheet(72/104 Pages) TI1

номер детали	TMS320VC5421

подробное описание детали	Fixed-Point Digital Signal Processor

PDF	104 Pages

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производитель	TI1 [Texas Instruments]

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Electrical Specifications

December 1999 − Revised October 2008

SPRS098D

5.8.2 Parallel I/O Port Write

The following switching characteristics table assumes testing over recommended operating conditions with

IOSTRB = 0 and H = 0.5tc(CO) (see Figure 5−9).

Table 5−13. Parallel I/O Port Write Switching Characteristics

PARAMETER

MIN

MAX

UNIT

td(CLKL-A)

Delay time, CLKOUT low to address valid†

−1

td(CLKH-ISTRBL)

Delay time, CLKOUT high to IOSTRB low

td(CLKH-D)IOW

Delay time, CLKOUT high to write data valid

H−5

H+5

td(CLKH-ISTRBH)

Delay time, CLKOUT high to IOSTRB high

td(CLKL-RWL)

Delay time, CLKOUT low to R/W low

td(CLKL-RWH)

Delay time, CLKOUT low to R/W high

th(A)IOW

Hold time, address valid after CLKOUT low†

−1

th(D)IOW

Hold time, write data after IOSTRB high

H−3

H+7

tsu(D)IOSTRBH

Setup time, write data before IOSTRB high

H−5

H+1

tsu(A)IOSTRBL

Setup time, address valid before IOSTRB low†

H−5

H+3

† Address and IS timings are included in timings referenced as address.

R/W

IOSTRB

PPD[15:0]

PPA[18:0]

CLKOUT

td(CLKH-ISTRBH)

th(A)IOW

th(D)IOW

td(CLKH-D)IOW

td(CLKH-ISTRBL)

td(CLKL-A)

td(CLKL-RWL)

td(CLKL-RWH)

tsu(A)IOSTRBL

tsu(D)IOSTRBH

Figure 5−9. Parallel I/O Port Write (IOSTRB=0)

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