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TMS320VC5421 датащи(PDF) 52 Page - Texas Instruments

номер детали TMS320VC5421
подробное описание детали  Fixed-Point Digital Signal Processor
PDF  104 Pages
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TMS320VC5421 датащи(HTML) 52 Page - Texas Instruments

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Functional Overview
52
December 1999 − Revised October 2008
SPRS098D
3.10 Memory-Mapped Registers
The 5421 has 27 memory-mapped CPU registers, which are mapped in data memory space address 0h to
1Fh. Each 5421 device also has a set of memory-mapped registers associated with peripherals. Table 3−19
gives a list of CPU memory-mapped registers (MMRs) available. Table 3−20 shows additional peripheral
MMRs associated with the 5421.
Table 3−19. Processor Memory-Mapped Registers for Each DSP Subsystem
NAME
ADDRESS
DESCRIPTION
NAME
DEC
HEX
DESCRIPTION
IMR
0
0
Interrupt Mask Register
IFR
1
1
Interrupt Flag Register
—
2−5
2−5
Reserved for testing
ST0
6
6
Status Register 0
ST1
7
7
Status Register 1
AL
8
8
Accumulator A Low Word (15−0)
AH
9
9
Accumulator A High Word (31−16)
AG
10
A
Accumulator A Guard Bits (39−32)
BL
11
B
Accumulator B Low Word (15−0)
BH
12
C
Accumulator B High Word (31−16)
BG
13
D
Accumulator B Guard Bits (39−32)
TREG
14
E
Temporary Register
TRN
15
F
Transition Register
AR0
16
10
Auxiliary Register 0
AR1
17
11
Auxiliary Register 1
AR2
18
12
Auxiliary Register 2
AR3
19
13
Auxiliary Register 3
AR4
20
14
Auxiliary Register 4
AR5
21
15
Auxiliary Register 5
AR6
22
16
Auxiliary Register 6
AR7
23
17
Auxiliary Register 7
SP
24
18
Stack Pointer
BK
25
19
Circular Buffer Size Register
BRC
26
1A
Block-Repeat Counter
RSA
27
1B
Block-Repeat Start Address
REA
28
1C
Block-Repeat End Address
PMST
29
1D
Processor Mode Status Register
XPC
30
1E
Extended Program Counter
—
31
1F
Reserved



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