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PEB2256HT датащи(PDF) 29 Page - Infineon Technologies AG |
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PEB2256HT датащи(HTML) 29 Page - Infineon Technologies AG |
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29 / 490 page ![]() FALC56 V1.2 PEB 2256 Pin Descriptions Data Sheet 29 2002-08-27 2.3 Pin Definitions and Functions • Table 1 Pin Definitions - Microprocessor Interface Pin No. Ball No. Symbol Input (I) Output (O) Supply (S) Function 50 49 48 47 46 45 44 43 E6 E8 F9 F6 F8 G9 F7 G8 A7 A6 A5 A4 A3 A2 A1 A0 I + PU Address Bus These inputs interface with eight bits of the system’s address bus to select one of the internal registers for read or write. 21 22 23 26 27 28 29 30 31 32 33 36 37 38 39 40 J1 J2 H3 H4 F4 J4 H5 F5 J5 G5 G6 H6 G7 H7 J8 H8 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 I/O + PU Data Bus Bidirectional tristate data lines which interface with the system’s data bus. Their configuration is controlled by the level of pin DBW: 8-bit mode (DBW = 0): D(7:0) are active. D(15:8) are internally pulled high. 16-bit mode (DBW = 1): D(15:0) are active. In case of byte transfers, the active half of the bus is determined by A0 and BHE/BLE and the selected bus interface mode (via pin IM). The unused half is internally pulled high. |
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