PIC17C752-08SLASHCL datasheet(144/328 Pages) MICROCHIP

144 / 328 page

PIC17C7XX

DS30289A-page 144

15.2.1.3

SLAVE TRANSMISSION

When the R/W bit of the incoming address byte is set

and an address match occurs, the R/W bit of the

SSPSTAT register is set. The received address is

loaded into the SSPBUF register. The ACK pulse will

be sent on the ninth bit, and the SCLpin is held low. The

transmit data must be loaded into the SSPBUF register,

which also loads the SSPSR register. Then SCL pin

should be enabled by setting bit CKP (SSPCON1<4>).

The master must monitor the SCL pin prior to asserting

another clock pulse. The slave devices may be holding

off the master by stretching the clock. The eight data

bits are shifted out on the falling edge of the SCL input.

This ensures that the SDA signal is valid during the

SCL high time (Figure 15-16).

An SSP interrupt is generated for each data transfer

byte. The SSPIF ﬂag bit must be cleared in software,

and the SSPSTAT register is used to determine the sta-

tus of the byte tranfer. The SSPIF ﬂag bit is set on the

falling edge of the ninth clock pulse.

As a slave-transmitter, the ACK pulse from the mas-

ter-receiver is latched on the rising edge of the ninth

SCL input pulse. If the SDA line was high (not ACK),

then the data transfer is complete. When the not ACK

is latched by the slave, the slave logic is reset and the

slave then monitors for another occurrence of the

START bit. If the SDA line was low (ACK), the transmit

data must be loaded into the SSPBUF register, which

also loads the SSPSR register. Then the SCL pin

should be enabled by setting the CKP bit.

FIGURE 15-15: I2C WAVEFORMS FOR RECEPTION (7-BIT ADDRESS)

FIGURE 15-16: I2C WAVEFORMS FOR TRANSMISSION (7-BIT ADDRESS)

A7 A6 A5 A4 A3 A2 A1

SDA

SCL

Bus Master

terminates

transfer

Bit SSPOV is set because the SSPBUF register is still full.

Cleared in software

SSPBUF register is read

ACK

Receiving Data

ACK

R/W=0

Receiving Address

SSPIF

BF (SSPSTAT<0>)

SSPOV (SSPCON1<6>)

ACK

ACK is not sent.

Not

SDA

SCL

SSPIF

BF (SSPSTAT<0>)

CKP (SSPCON1<4>)

ACK

Not ACK

Transmitting Data

R/W = 1

Receiving Address

56789

123

cleared in software

SSPBUF is written in software

From SSP interrupt

service routine

Set bit after writing to SSPBUF

Data in

sampled

SCL held low

while CPU

responds to SSPIF

(the SSPBUF must be written-to

before the CKP bit can be set)

R/W = 0

PIC17C752-08/CL датащи(PDF) 144 Page - Microchip Technology

PIC17C752-08/CL датащи(HTML) 144 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL