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PIC17C752-08/CL датащи(PDF) 78 Page - Microchip Technology

номер детали PIC17C752-08/CL
подробное описание детали  High-Performance 8-Bit CMOS EPROM Microcontrollers with 10-bit A/D
PDF  328 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC17C752-08/CL датащи(HTML) 78 Page - Microchip Technology

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PIC17C7XX
DS30289A-page 78
© 1998 Microchip Technology Inc.
10.4
PORTD and DDRD Registers
PORTD is an 8-bit bi-directional port. The correspond-
ing data direction register is DDRD. A '1' in DDRD con-
figures the corresponding port pin as an input. A '0' in
the DDRD register configures the corresponding port
pin as an output. Reading PORTD reads the status of
the pins, whereas writing to PORTD will write to the
port latch. PORTD is multiplexed with the system bus.
When operating as the system bus, PORTD is the high
order byte of the address/data bus (AD15:AD8). The
timing for the system bus is shown in the Electrical
Specifications section.
Note:
This port is configured as the system bus
when the device’s configuration bits are
selected to Microprocessor or Extended
Microcontroller modes. In the two other
microcontroller modes, this port is a gen-
eral purpose I/O.
Example 10-4 shows an instruction sequence to initial-
ize PORTD. The Bank Select Register (BSR) must be
selected to Bank 1 for the port to be initialized. The fol-
lowing example uses the MOVLB instruction to load the
BSR register for bank selection.
EXAMPLE 10-4: INITIALIZING PORTD
MOVLB
1
; Select Bank 1
CLRF
PORTD, F
; Initialize PORTD data
; latches before setting
; the data direction reg
MOVLW
0xCF
; Value used to initialize
; data direction
MOVWF
DDRD
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
FIGURE 10-10: BLOCK DIAGRAM OF RD7:RD0 PORT PINS (IN I/O PORT MODE)
Note: I/O pins have protection diodes to VDD and Vss.
Q
D
CK
TTL
0
1
Q
D
CK
R
S
Input
Buffer
Port
Data
to D_Bus
→ IR
INSTRUCTION READ
Data Bus
RD_PORTD
WR_PORTD
RD_DDRD
WR_DDRD
EX_EN
DATA/ADDR_OUT
DRV_SYS
SYS BUS
Control



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