PIC17C752-08SLASHCL datasheet(69/328 Pages) MICROCHIP

69 / 328 page

DS30289A-page 69

PIC17C7XX

10.0

I/O PORTS

PIC17C75X devices have seven I/O ports, PORTA

through PORTG. PIC17C76X devices have nine I/O

ports, PORTA through PORTJ. PORTB through PORTJ

have a corresponding Data Direction Register (DDR),

which is used to conﬁgure the port pins as inputs or out-

puts. Some of these ports pins are multiplexed with

alternate functions.

PORTC, PORTD, and PORTE are multiplexed with the

system bus. These pins are conﬁgured as the system

bus when the device’s conﬁguration bits are selected to

Microprocessor or Extended Microcontroller modes. In

the two other microcontroller modes, these pins are

general purpose I/O.

PORTA, PORTB, PORTE<3>, PORTF, PORTG and the

upper four bits of PORTH are multiplexed with the

peripheral features of the device. These peripheral fea-

tures are:

• Timer modules

• Capture modules

• PWM modules

• USART/SCI modules

• SSP Module

• A/D Module

• External Interrupt pin

When some of these peripheral modules are turned on,

the port pin will automatically conﬁgure to the alternate

function. The modules that do this are:

• PWM module

• SSP module

• USART/SCI module

When a pin is automatically conﬁgured as an output by

a peripheral module, the pins data direction (DDR) bit

is unknown. After disabling the peripheral module, the

user should re-initialize the DDR bit to the desired con-

ﬁguration.

The other peripheral modules (which require an input)

must have their data direction bits conﬁgured appropri-

ately.

When the device enters the "reset state" the Data

Direction registers (DDR) are forced set which will

make the I/O hi-impendance inputs. The reset state of

some peripheral modules may force the I/O to other

operations, such as analog inputs or the system bus.

Note:

A pin that is a peripheral input, can be con-

ﬁgured as an output (DDRx<y> is cleared).

The peripheral events will be determined

by the action output on the port pin.

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