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PIC17C752-08/CL датащи(PDF) 65 Page - Microchip Technology

номер детали PIC17C752-08/CL
подробное описание детали  High-Performance 8-Bit CMOS EPROM Microcontrollers with 10-bit A/D
PDF  328 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC17C752-08/CL датащи(HTML) 65 Page - Microchip Technology

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© 1998 Microchip Technology Inc.
DS30289A-page 65
PIC17C7XX
9.0
HARDWARE MULTIPLIER
All PIC17C7XX devices have an 8 x 8 hardware multi-
plier included in the ALU of the device. By making the
multiply a hardware operation, it completes in a single
instruction cycle.
This is an unsigned multiply that
gives a 16-bit result. The result is stored into the 16-bit
PRODuct register (PRODH:PRODL). The multiplier
does not affect any flags in the ALUSTA register.
Making the 8 x 8 multiplier execute in a single cycle
gives the following advantages:
• Higher computational throughput
• Reduces code size requirements for multiply algo-
rithms
The performance increase allows the device to be used
in applications previously reserved for Digital Signal
Processors.
Table 9-1 shows a performance comparison between
PIC17CXXX devices using the single cycle hardware
multiply, and performing the same function without the
hardware multiply.
Example 9-1 shows the sequence to do an 8 x 8
unsigned multiply. Only one instruction is required
when one argument of the multiply is already loaded in
the WREG register.
Example 9-2 shows the sequence to do an 8 x 8 signed
multiply. To account for the sign bits of the arguments,
each argument’s most significant bit (MSb) is tested
and the appropriate subtractions are done.
EXAMPLE 9-1:
8 x 8 UNSIGNED MULTIPLY
ROUTINE
EXAMPLE 9-2:
8 x 8 SIGNED MULTIPLY
ROUTINE
MOVFP
ARG1, WREG
;
MULWF
ARG2
; ARG1 * ARG2 ->
;
PRODH:PRODL
MOVFP
ARG1, WREG
MULWF
ARG2
; ARG1 * ARG2 ->
;
PRODH:PRODL
BTFSC
ARG2, SB
; Test Sign Bit
SUBWF
PRODH, F
; PRODH = PRODH
;
- ARG1
MOVFP
ARG2, WREG
BTFSC
ARG1, SB
; Test Sign Bit
SUBWF
PRODH, F
; PRODH = PRODH
;
- ARG2
TABLE 9-1:
PERFORMANCE COMPARISON
Routine
Multiply Method
Program
Memory
(Words)
Cycles
(Max)
Time
@ 33 MHz
@ 16 MHz
@ 8 MHz
8 x 8 unsigned
Without hardware multiply
13
69
8.364
µs
17.25
µs
34.50
µs
Hardware multiply
1
1
0.121
µs
0.25
µs
0.50
µs
8 x 8 signed
Without hardware multiply
Hardware multiply
6
6
0.727
µs
1.50
µs
3.0
µs
16 x 16 unsigned
Without hardware multiply
21
242
29.333
µs
60.50
µs
121.0
µs
Hardware multiply
24
24
2.91
µs
6.0
µs
12.0
µs
16 x 16 signed
Without hardware multiply
52
254
30.788
µs
63.50
µs
127.0
µs
Hardware multiply
36
36
4.36
µs
9.0
µs
18.0
µs



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