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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PIC17C752-08/CL датащи(PDF) 48 Page - Microchip Technology |
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PIC17C752-08/CL датащи(HTML) 48 Page - Microchip Technology |
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48 / 328 page  PIC17C7XX DS30289A-page 48 © 1998 Microchip Technology Inc. Bank 6: 10h SSPADD SSP Address register in I2C slave mode. SSP baud rate reload register in I2C master mode. 0000 0000 0000 0000 11h SSPCON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000 12h SSPCON2 GCEN AKSTAT AKDT AKEN RCEN PEN RSEN SEN 0000 0000 0000 0000 13h SSPSTAT SMP CKE D/A P S R/W UA BF 0000 0000 0000 0000 14h SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register xxxx xxxx uuuu uuuu 15h Unimple- mented — — — — — — — — ---- ---- ---- ---- 16h Unimple- mented — — — — — — — — ---- ---- ---- ---- 17h Unimple- mented — — — — — — — — ---- ---- ---- ---- Bank 7: 10h PW3DCL DC1 DC0 TM2PW3 - - - - - xx0- ---- uu0- ---- 11h PW3DCH DC9 DC8 DC7 DC6 DC5 DC4 DC3 DC2 xxxx xxxx uuuu uuuu 12h CA3L Capture3 low byte xxxx xxxx uuuu uuuu 13h CA3H Capture3 high byte xxxx xxxx uuuu uuuu 14h CA4L Capture4 low byte xxxx xxxx uuuu uuuu 15h CA4H Capture4 high byte xxxx xxxx uuuu uuuu 16h TCON3 — CA4OVF CA3OVF CA4ED1 CA4ED0 CA3ED1 CA3ED0 PWM3ON -000 0000 -000 0000 17h Unimple- mented — — — — — — — — ---- ---- ---- ---- Bank 8:(3) 10h(3) DDRH Data direction register for PORTH 1111 1111 1111 1111 11h(3) PORTH (4) RH7/ AN15 RH6/ AN14 RH5/ AN13 RH4/ AN12 RH3 RH2 RH1 RH0 xxxx xxxx uuuu uuuu 12h(3) DDRJ Data direction register for PORTJ 1111 1111 1111 1111 13h(3) PORTJ (4) RJ7 RJ6 RJ5 RJ4 RJ3 RJ2 RJ1 RJ0 xxxx xxxx uuuu uuuu 14h(3) Unimple- mented — — — — — — — — ---- ---- ---- ---- 15h(3) Unimple- mented — — — — — — — — ---- ---- ---- ---- 16h(3) Unimple- mented — — — — — — — — ---- ---- ---- ---- 17h(3) Unimple- mented — — — — — — — — ---- ---- ---- ---- Unbanked 18h PRODL Low Byte of 16-bit Product (8 x 8 Hardware Multiply) xxxx xxxx uuuu uuuu 19h PRODH High Byte of 16-bit Product (8 x 8 Hardware Multiply) xxxx xxxx uuuu uuuu TABLE 7-3: SPECIAL FUNCTION REGISTERS (Cont.’d) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR MCLR, WDT Legend: x = unknown, u = unchanged,- = unimplemented read as '0',q - value depends on condition. Shaded cells are unimplemented, read as '0'. Note1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for PC<15:8> whose contents are updated from or transferred to the upper byte of the program counter. 2: The TO and PD status bits in CPUSTA are not affected by a MCLR reset. 3: Bank 8 and associated registers are only implemented on the PIC17C76X devices. 4: This is the value that will be in the port output latch. 5: When the device is configured for microprocessor or extended microcontroller mode, the operation of this port does not rely on these registers. 6: On any device reset, these pins are configured as inputs. |
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