UM0434 datasheet(46/390 Pages) STMICROELECTRONICS

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UM0434

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4.5.2

Integer exception register (XER)

The XER, shown in

Table 13, tracks exception conditions for integer operations.

XER fields are described in

Table 14.

4.6

Registers for branch operations

This section describes registers used by Book E branch and CR operations.

4.6.1

Condition register (CR)

CR, shown in

Table 15, reflects the result of certain operations and provides a mechanism

for testing and branching.

Table 13.

Integer Exception Register (XER)

34 35

Field SO OV CA

—

Number of bytes

Reset

All zeros

R/W

SPR

SPR 1

Table 14.

XER field descriptions

Bits

Name

Description

Summary overflow. Set when an instruction (except mtspr) sets the overflow bit (OV). SO remains

set until it is cleared by mtspr[XER] or mcrxr. SO is not altered by compare instructions or other

instructions that cannot overflow (except mtspr[XER] and mcrxr). Executing mtspr[XER] with the

values 0 for SO and 1 for OV clears SO and sets OV.

Overflow. X-form add, subtract from, and negate instructions with OE=1 set OV if the carry out of

bit 32 is not equal to the carry out of bit 33. Otherwise, they clear OV to indicate a signed overflow.

X-form multiply low word and divide word instructions with OE=1 set OV if the result cannot be

represented in 32 bits (mullwo, divwo, and divwuo) and clear OV otherwise. OV is not altered by

compare instructions or other instructions that cannot overflow (except mtspr[XER] and mcrxr).

Carry. Add carrying, subtract from carrying, add extended, and subtract from extended instructions

set CA if there is a carry out of bit 32 and clear it otherwise. CA can be used to indicate unsigned

overflow for add and subtract operations that set CA. Shift right algebraic word instructions set CA

if any 1 bits are shifted out of a negative operand and clear CA otherwise. Compare instructions

and instructions that cannot carry (except Shift Right Algebraic Word, mtspr[XER], and mcrxr) do

not affect CA.

35–56

—

Reserved, should be cleared.

57–63

Numb

bytes

Supports emulation of load and store string instructions. Specifies the number of bytes to be

transferred by a load string indexed or store string indexed instruction.

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