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82374EB датащи(PDF) 74 Page - Intel Corporation |
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82374EB датащи(HTML) 74 Page - Intel Corporation |
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74 / 208 page ![]() 82374EB82374SB 3226 DCMDMA CLEAR MASK REGISTER Register Location 00EhChannels 0-3 0DChChannels 4-7 Default Value xxh Attribute Write Only Size na Software Command This command clears the mask bits of all four channels enabling them to accept DMA requests IO port 0Eh is used for Channels 0-3 and IO port 0DCh is used for Channels 4-7 Bit Description 70 Clear Mask No specific pattern Command enabled with a write to the IO port address 33 Timer Unit Registers The ESC contains five counters that are equivalent to those found in the 82C54 Programmable Interval Timer The Timer registers control these counters and can be accessed from the EISA Bus via IO space This section describes the countertimer registers on the ESC The countertimer operations are further described in Section 80 Interval Timer 331 TCWTIMER CONTROL WORD REGISTER Register Location 043hTimer 1 04BhTimer 2 Default Value xxh Attribute Write Only Size 8 Bits The Timer Control Word specifies the counter selection the operating mode the counter byte programming order and size of the COUNT value and whether it counts down in a 16-bit or binary-coded decimal (BCD) format After writing the control word a new count may be written at any time The new value will take effect according to the programmed mode There are six programmable counting modes Typically the ESC Timer Unit Counters 0 and 2 are programmed for Mode 3 the Square Wave Mode while Counter 1 is programmed in Mode 2 the Rate Generator Mode Two special commands are selected through the Control Word Register The Counter Latch Command is selected when bits 54 are both 0 The Read-Back Command is selected when bits 76 are both 1 When either of these two commands are selected with the Control Word Register the meaning of the other bits in the register changes Both of these special commands and the respective changes they make to the bit definitions in this register are covered in detail under separate register descriptions later in this section Bits 4 and 5 are also used to select the count register programming mode The programming process is simple 1 Write a control word 2 Write an initial count for each counter 3 Load the LSB MSB or LSB then MSB The readwrite selection chosen with the control word dictates the programming sequence that must follow when initializing the specified counter 74 |
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