AD9523-1SLASHPCBZ datasheet(13/60 Pages) AD

13 / 60 page

AD9523-1

Rev. B | Page 13 of 60

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

LDO_PLL1

VDD3_PLL

REFA

REFB

LF1_EXT_CAP

OSC_CTRL

OSC_IN

LF2_EXT_CAP

LDO_VCO

VDD3_VCO

LDO_DIV_M1

REF_SEL

SYNC

VDD3_REF

VDD1.8_OUT[4:5]

OUT4

VDD3_OUT[4:5]

OUT5

VDD1.8_OUT[6:7]

OUT6

VDD3_OUT[6:7]

OUT7

VDD1.8_OUT[8:9]

OUT8

VDD3_OUT[8:9]

OUT9

PIN 1

INDICATOR

AD9523-1

TOP VIEW

(Not to Scale)

NOTES

1. THE EXPOSED PADDLE IS THE GROUND CONNECTION ON THE CHIP. IT MUST BE SOLDERED

TO THE ANALOG GROUND OF THE PCB TO ENSURE PROPER FUNCTIONALITY

AND HEAT DISSIPATION, NOISE, AND MECHANICAL STRENGTH BENEFITS.

Figure 2. Pin Configuration

Table 18. Pin Function Descriptions

No.

Mnemonic

Type1

Description

LDO_PLL1

P/O

1.8 V Internal LDO Regulator Decoupling Pin for PLL1. Connect a 0.47 μF decoupling capacitor from

this pin to ground. Note that for best performance, the LDO bypass capacitor must be placed in close

proximity to the device.

VDD3_PLL

3.3 V Supply PLL1 and PLL2. Use the same supply as VCXO.

REFA

Reference Clock Input A. Along with REFA, this pin is the differential input for the PLL reference.

Alternatively, this pin can be programmed as a single-ended 3.3 V CMOS input.

REFA

Complementary Reference Clock Input A. Along with REFA, this pin is the differential input for the

PLL reference. Alternatively, this pin can be programmed as a single-ended 3.3V CMOS input.

REFB

Reference Clock Input B. Along with REFB, this pin is the differential input for the PLL reference.

Alternatively, this pin can be programmed as a single-ended 3.3 V CMOS input.

REFB

Complementary Reference Clock Input B. Along with REFB, this pin is the differential input for the PLL

reference. Alternatively, this pin can be programmed as a single-ended 3.3 V CMOS input.

LF1_EXT_CAP

PLL1 External Loop Filter Capacitor. Connect this pin to ground.

OSC_CTRL

Oscillator Control Voltage. Connect this pin to the voltage control pin of the external oscillator.

OSC_IN

PLL1 Oscillator Input. Along with OSC_IN, this pin is the differential input for the PLL reference.

Alternatively, this pin can be programmed as a single-ended 3.3 V CMOS input.

OSC_IN

Complementary PLL1 Oscillator Input. Along with OSC_IN, this pin is the differential input for the PLL

reference. Alternatively, this pin can be programmed as a single-ended 3.3 V CMOS input.

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