LPC2921 datasheet(64/83 Pages) NXP

64 / 83 page

LPC2921_23_25_1

Preliminary data sheet

Rev. 01 — 15 June 2009

64 of 83

NXP Semiconductors

LPC2921/2923/2925

ARM9 microcontroller with CAN, LIN, and USB

Dynamic characteristics

9.1 Dynamic characteristics: I/O and CLKOUT pins, internal clock,

oscillators, PLL, and CAN

[1]

All parameters are guaranteed over the virtual junction temperature range by design. Pre-testing is performed at Tamb =85 °C ambient

temperature on wafer level. Cased products are tested at Tamb =25 °C (ﬁnal testing). Both pre-testing and ﬁnal testing use correlated

test conditions to cover the speciﬁed temperature and power supply voltage range.

[2]

See Table 24.

[3]

This parameter is not part of production testing or ﬁnal testing, hence only a typical value is stated.

[4]

Oscillator start-up time depends on the quality of the crystal. For most crystals it takes about 1000 clock pulses until the clock is fully

stable.

Table 33.

Dynamic characteristics

VDD(CORE) =VDD(OSC_PLL); VDD(IO) = 2.7 V to 3.6 V; VDDA(ADC3V3) = 3.0 V to 3.6 V; all voltages are measured with respect to

ground; positive currents ﬂow into the IC; unless otherwise speciﬁed.[1]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

I/O pins

tTHL

HIGH to LOW transition

time

CL = 30 pF

13.8

tTLH

LOW to HIGH transition

time

CL = 30 pF

13.8

CLKOUT pin

fclk

clock frequency

on pin CLKOUT

MHz

Internal clock

fclk(sys)

system clock frequency

[2] 10

125

MHz

Tclk(sys)

system clock period

[2] 8

100

Low-power ring oscillator

fref(RO)

RO reference

frequency

0.4

0.5

0.6

MHz

tstartup

start-up time

at maximum frequency

[3] -6

µs

Oscillator

fi(osc)

oscillator input

frequency

maximum frequency is

the clock input of an

external clock source

applied to the Xin pin

100

MHz

tstartup

start-up time

at maximum frequency

[3]

[4]

500

µs

PLL

fi(PLL)

PLL input frequency

MHz

fo(PLL)

PLL output frequency

160

MHz

CCO; direct mode

156

320

MHz

ta(clk)

clock access time

63.4

ta(A)

address access time

60.3

Jitter speciﬁcation for CAN

tjit(cc)(p-p)

cycle to cycle jitter

(peak-to-peak value)

on CAN TXDC pin

[3] -

0.4

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