LPC2921 datasheet(57/83 Pages) NXP

57 / 83 page

LPC2921_23_25_1

Preliminary data sheet

Rev. 01 — 15 June 2009

57 of 83

NXP Semiconductors

LPC2921/2923/2925

ARM9 microcontroller with CAN, LIN, and USB

[1]

All parameters are guaranteed over the virtual junction temperature range by design. Pre-testing is performed at Tamb =85 °Conwafer

level. Cased products are tested at Tamb =25 °C (ﬁnal testing). Both pre-testing and ﬁnal testing use correlated test conditions to cover

the speciﬁed temperature and power-supply voltage range.

[2]

Leakage current is exponential to temperature; worst-case value is at 85

°C T

vj. All clocks off. Analog modules and FLASH powered

down.

[3]

For I/O Port 0, the maximum input voltage is deﬁned by VI(ADC).

[4]

Not 5 V-tolerant when pull-up is on.

[5]

For Port 0, pin 0 to pin 15 add maximum 1.5 pF for input capacitance to ADC. For Port 0, pin 16 to pin 31 add maximum 1.0 pF for input

capacitance to ADC.

[6]

Cxtal is crystal load capacitance and Cext are the two external load capacitors.

[7]

This parameter is not part of production testing or ﬁnal testing, hence only a typical value is stated. Maximum and minimum values are

based on simulation results.

[8]

The power-up reset has a time ﬁlter: VDD(CORE) must be above Vtrip(high) for 2 µs before reset is de-asserted; VDD(CORE) must be below

Vtrip(low) for 11 µs before internal reset is asserted.

IOLS

LOW-level short-circuit

output current

drive high; pad

connected to VDD(IO)

95.1

Oscillator

VXIN_OSC

voltage on pin XIN_OSC

1.8

Rs(xtal)

crystal series resistance

fosc = 10 MHz to 15 MHz

[6]

Cxtal =10pF;

Cext =18pF

160

Ω

Cxtal =20pF;

Cext =39pF

Ω

fosc = 15 MHz to 20 MHz

[6]

Cxtal =10pF;

Cext =18pF

Ω

input capacitance

of XIN_OSC

[7] --

Power-up reset

Vtrip(high)

high trip level voltage

[8] 1.1

1.4

1.6

Vtrip(low)

low trip level voltage

[8] 1.0

1.3

1.5

Vtrip(dif)

difference between high

and low trip level voltage

[8] 50

120

180

Table 31.

Static characteristics …continued

VDD(CORE) =VDD(OSC_PLL) ; VDD(IO) = 2.7 V to 3.6 V; VDDA(ADC3V3) = 3.0 V to 3.6 V; Tvj = −40 °Cto+85 °C; all voltages are

measured with respect to ground; positive currents ﬂow into the IC; unless otherwise speciﬁed.[1]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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