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LPC2921 датащи(PDF) 18 Page - NXP Semiconductors |
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LPC2921 датащи(HTML) 18 Page - NXP Semiconductors |
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18 / 83 page ![]() LPC2921_23_25_1 © NXP B.V. 2009. All rights reserved. Preliminary data sheet Rev. 01 — 15 June 2009 18 of 83 NXP Semiconductors LPC2921/2923/2925 ARM9 microcontroller with CAN, LIN, and USB With dual buffering, a secondary buffer line is used, the output of the flash being considered as the primary buffer. On a primary buffer, hit data can be copied to the secondary buffer line, which allows the flash to start a speculative read of the next flash word. Both buffer lines are invalidated after: • Initialization • Configuration-register access • Data-latch reading • Index-sector reading The modes of operation are listed in Table 9. 6.8.2 Flash layout The ARM processor can program the flash for ISP (In-System Programming) through the flash memory controller. Note that the flash always has to be programmed by ‘flash words’ of 128 bits (four 32-bit AHB bus words, hence 16 bytes). The flash memory is organized into eight ‘small’ sectors of 8 kB each and up to 11 ‘large’ sectors of 64 kB each. The number of large sectors depends on the device type. A sector must be erased before data can be written to it. The flash memory also has sector-wise protection. Writing occurs per page which consists of 4096 bits (32 flash words). A small sector contains 16 pages; a large sector contains 128 pages. Table 10 gives an overview of the flash-sector base addresses. Table 9. Flash read modes Synchronous timing No buffer line for single (non-linear) reads; one flash-word read per word read Single buffer line default mode of operation; most recently read flash word is kept until another flash word is required Asynchronous timing No buffer line one flash-word read per word read Single buffer line most recently read flash word is kept until another flash word is required Dual buffer line, single speculative on a buffer miss a flash read is done, followed by at most one speculative read; optimized for execution of code with small loops (less than eight words) from flash Dual buffer line, always speculative most recently used flash word is copied into second buffer line; next flash-word read is started; highest performance for linear reads Table 10. Flash sector overview Flash memory sector number Sector size (kB) Flash memory address LPC2921 LPC2923 LPC2925 11 8 0x2000 0000 yes yes yes 12 8 0x2000 2000 yes yes yes 13 8 0x2000 4000 yes yes yes 14 8 0x2000 6000 yes yes yes 15 8 0x2000 8000 yes yes yes |
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