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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LXT971ABC датащи(PDF) 47 Page - Intel Corporation |
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LXT971ABC датащи(HTML) 47 Page - Intel Corporation |
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47 / 90 page  LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet 47 Document #: 249414 Revision #: 002 Rev. Date: August 7, 2002 Table 12. BSR Mode of Operation Mode Description 1Capture 2Shift 3 Update 4 System Function Table 13. Supported JTAG Instructions Name Code Description Mode Data Register EXTEST 1111 1111 1110 1000 External Test Test BSR IDCODE 1111 1111 1111 1110 ID Code Inspection Normal ID REG SAMPLE 1111 1111 1111 1000 Sample Boundary Normal BSR HIGHZ 1111 1111 1100 1111 Force Float Normal Bypass CLAMP 1111 1111 1110 1111 Control Boundary to 1/0 Test Bypass BYPASS 1111 1111 1111 1111 Bypass Scan Normal Bypass Table 14. Device ID Register 31:28 27:12 11:8 7:1 0 Version2 Part ID (hex) Jedec Continuation Characters JEDEC ID1 Reserved XXXX 03CB 0000 111 1110 1 1. The JEDEC IS is an 8-bit identifier. The MSB is for parity and is ignored. Intel’s JEDEC ID is FE (1111 1110), which becomes 111 1110. 2. See the LXT971A/972A Specification Update (document number 249354) for the current version of the Jedec continuation characters. |
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