LXT971ABC datasheet(36/90 Pages) INTEL

36 / 90 page

LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver

Datasheet

Document #: 249414

Revision #: 002

Rev. Date: August 7, 2002

3.7

100 Mbps Operation

3.7.1

100BASE-X Network Operations

During 100BASE-X operation, the LXT971A transmits and receives 5-bit symbols across the

network link. Figure 14 shows the structure of a standard frame packet. When the MAC is not

actively transmitting data, the LXT971A sends out Idle symbols on the line.

In 100BASE-TX mode, the LXT971A scrambles and transmits the data to the network using MLT-

3 line code (Figure 15 on page 37). MLT-3 signals received from the network are de-scrambled,

decoded, and sent across the MII to the MAC.

In 100BASE-FX mode, the LXT971A transmits and receives NRZI signals across the LVPECL

interface. An external 100FX transceiver module is required to complete the fiber connection. To

enable 100BASE-FX operation, auto-negotiation must be disabled and FX selected.

Table 10. Carrier Sense, Loopback, and Collision Conditions

Speed

Duplex Condition

Carrier Sense

Test1

Loopback

Operational

Loopback

Collision

100 Mbps

Full-Duplex

Receive Only

Yes

None

Half-Duplex

Transmit or Receive

Transmit and Receive

10 Mbps

Full-Duplex

Receive Only

Yes

None

Half-Duplex,

Transmit or Receive

Yes

Transmit and Receive

Half-Duplex,

Transmit or Receive

Transmit and Receive

1. Test Loopback is enabled when 0.14 = 1

Figure 14. 100BASE-X Frame Format

SFD

64-Bit Preamble

(8 Octets)

Start-of-Frame

Delimiter (SFD)

Destination and Source

Address (6 Octets each)

Packet Length

(2 Octets)

Data Field

(Pad to minimum packet size)

Frame Check Field

(4 Octets)

CRC

InterFrame Gap / Idle Code

(> 12 Octets)

Replaced by

/T/R/ code-groups

End-of-Stream Delimiter (ESD)

IFG

Replaced by

/J/K/ code-groups

Start-of-Stream

Delimiter (SSD)

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