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LXT971ABC датащи(PDF) 38 Page - Intel Corporation

номер детали LXT971ABC
подробное описание детали  3.3V Dual-Speed Fast Ethernet PHY Transceiver
PDF  90 Pages
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производитель  INTEL [Intel Corporation]
домашняя страница  http://www.intel.com
Logo INTEL - Intel Corporation

LXT971ABC датащи(HTML) 38 Page - Intel Corporation

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LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
38
Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
3.7.2
Collision Indication
Figure 18 shows normal transmission. Upon detection of a collision, the COL output is asserted
and remains asserted for the duration of the collision as shown in Figure 19.
3.7.3
100BASE-X Protocol Sublayer Operations
With respect to the 7-layer communications model, the LXT971A is a Physical Layer 1 (PHY)
device. The LXT971A implements the Physical Coding Sublayer (PCS), Physical Medium
Attachment (PMA), and Physical Medium Dependent (PMD) sublayers of the reference model
defined by the IEEE 802.3u standard. The following paragraphs discuss LXT971A operation from
the reference model point of view.
3.7.3.1
PCS Sublayer
The Physical Coding Sublayer (PCS) provides the MII interface, as well as the 4B/5B encoding/
decoding function.
For 100BASE-TX and 100FX operation, the PCS layer provides IDLE symbols to the PMD-layer
line driver as long as TX_EN is de-asserted.
3.7.3.1.1 Preamble Handling
When the MAC asserts TX_EN, the PCS substitutes a /J/K symbol pair, also known as the Start-of-
Stream Delimiter (SSD), for the first two nibbles received across the MII. The PCS layer continues
to encode the remaining MII data, following the coding in Table 11, until TX_EN is de-asserted. It
then returns to supplying IDLE symbols to the line driver.
Figure 18. 100BASE-TX Transmission with No Errors
Figure 19. 100BASE-TX Transmission with Collision
DA DA DA DA DA
DA
DA
DA DA
TX_CLK
TX_EN
TXD<3:0>
CRS
COL
PR
E
A
M
B
L
E
JAM
TX_CLK
TX_EN
TXD<3:0>
CRS
COL
PR
E
A
M
B
L
E
JAM
JAM
JAM



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