LXT971ABC datasheet(37/90 Pages) INTEL

37 / 90 page

LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver

Datasheet

Document #: 249414

Revision #: 002

Rev. Date: August 7, 2002

As shown in Figure 14 on page 36, the MAC starts each transmission with a preamble pattern. As

soon as the LXT971A detects the start of preamble, it transmits a Start-of-Stream Delimiter (SSD,

symbols J and K) to the network. It then encodes and transmits the rest of the packet, including the

balance of the preamble, the SFD, packet data, and CRC.

Once the packet ends, the LXT971A transmits the End-of- Stream Delimiter (ESD, symbols T and

R) and then returns to transmitting Idle symbols. 4B/5B coding is shown in Table 11 on page 40.

Figure 16 shows normal reception with no errors. When the LXT971A receives invalid symbols

from the line, it asserts RX_ER as shown in Figure 17.

Figure 15. 100BASE-TX Data Path

Parallel

Serial

Parallel

MLT3

-1

Transition = 1.

No Transition = 0.

All transitions must follow

pattern: 0, +1, 0, -1, 0, +1...

Scrambler Bypass Data Flow

S0 S1 S2 S3 S4

Standard Data Flow

Parallel

Serial

Parallel

D0 D1 D2 D3

4B/5B

S0 S1 S2 S3 S4

MLT3

-1

Transition = 1.

No Transition = 0.

All transitions must follow

pattern: 0, +1, 0, -1, 0, +1...

Scramble

De-

Scramble

Figure 16. 100BASE-TX Reception with No Errors

Figure 17. 100BASE-TX Reception with Invalid Symbol

RX_CLK

RX_DV

RXD<3:0>

RX_ER

preamble SFD SFD DA

CRC

RX_CLK

RX_DV

RXD<3:0>

RX_ER

preamble SFD SFD DA

LXT971ABC датащи(PDF) 37 Page - Intel Corporation

LXT971ABC датащи(HTML) 37 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90

датащи скачать

ссылки URL