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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AD9161BBCZ датащи(PDF) 16 Page - Analog Devices |
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AD9161BBCZ датащи(HTML) 16 Page - Analog Devices |
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16 / 144 page  AD9161/AD9162 Data Sheet Rev. D | Page 16 of 144 1 2 3 4 5 6 7 8 9 10 11 12 13 A VSS VNEG_N1P2 VDD25_DAC VNEG_N1P2 VDD25_DAC OUTPUT– OUTPUT+ VDD25_DAC VNEG_N1P2 VDD25_DAC VSS ISET VREF A B CLK+ VSS VSS VDD25_DAC VNEG_N1P2 VDD25_DAC VDD25_DAC VNEG_N1P2 VDD25_DAC VDD12A VDD12A VDD25_DAC VNEG_N1P2 B C CLK– VSS VSS VSS VDD25_DAC VNEG_N1P2 VNEG_N1P2 VDD25_DAC VBG_NEG VSS VSS VSS VSS C D VSS VDD12_CLK VDD12_CLK VDD12_CLK VDD12_CLK VSS VSS VDD12_CLK VDD12_CLK VDD12_CLK VDD12_CLK VDD12_CLK VDD12_CLK D E VDD12_CLK VSS VSS VSS DVDD DVDD VSS DVDD DVDD VSS VSS VSS VSS E F SYSREF+ SYSREF– VSS VSS VSS VSS VSS VSS VSS VSS VSS CS VSS F G VSS VSS TX_ENABLE IRQ DVDD DVDD DVDD DVDD DVDD SDIO SDO VSS VSS G H SERDIN7+ SERDIN7– VDD_1P2 RESET IOVDD DNC DNC DNC DNC DNC DVDD_1P2 VSS DVDD_1P2 IOVDD SCLK VDD_1P2 SERDIN0– SERDIN0+ H J VSS VSS VDD_1P2 VSS VSS VSS SYNCOUT– SYNCOUT+ VDD_1P2 VSS VSS J K SERDIN6+ SERDIN6– VTT_1P2 SYNC_ VDD_3P3 VSS PLL_CLK_ VDD12 PLL_LDO_ VDD12 SYNC_ VDD_3P3 VTT_1P2 SERDIN1– SERDIN1+ K L VSS VSS VDD_1P2 VDD_1P2 VDD_1P2 VSS VSS VDD_1P2 VDD_1P2 VDD_1P2 VSS VSS L M VSS VSS SERDIN5+ VSS SERDIN4+ VSS PLL_LDO_ BYPASS VSS SERDIN3+ VSS SERDIN2+ VSS VSS M N BIAS_VDD_1P2 VSS SERDIN5– VSS SERDIN4– VSS VSS VSS SERDIN3– VSS SERDIN2– VSS BIAS_ VDD_1P2 N 1 2 3 4 5 6 7 8 9 10 11 12 13 DNC = DO NOT CONNECT. –1.2V ANALOG SUPPLY V 1.2V DAC CLK SUPPLY V DAC RF SIGNALS 2.5V ANALOG SUPPLY V SERDES INPUT 1.2V DAC SUPPLY V SERDES 3.3V VCO SUPPLY V CMOS I/O IOVDD GROUND SERDES 1.2V SUPPLY V SYSREF±/SYNCOUT± REFERENCE Figure 5. 169-Ball CSP_BGA Pin Configuration Table 14. 169-Ball CSP_BGA Pin Function Descriptions Pin No. Mnemonic Description A1, A11, B2, B3, C2, C3, C4, C10, C11, C12, C13, D1, D6, D7, E2, E3, E4, E7, E10, E11, E12, E13, F3, F4, F5, F6, F7, F8, F9, F10, F11, F13, G1, G2, G12, G13, H7, J1, J2, J6, J7, J8, J12, J13, K6, L1, L2, L6, L8, L12, L13, M1, M2, M4, M6, M8, M10, M12, M13, N2, N4, N6, N7, N8, N10, N12 VSS Supply Return. Connect these pins to ground. A2, A4, A9, B5, B8, B13, C6, C7 VNEG_N1P2 −1.2 V Analog Supply Voltage. A3, A5, A8, A10, B4, B6, B7, B9, B12, C5, C8 VDD25_DAC 2.5 V Analog Supply Voltage. A6 OUTPUT− DAC Negative Current Output. A7 OUTPUT+ DAC Positive Current Output. A12 ISET Reference Current. Connect this pin to VNEG_N1P2 with a 9.6 kΩ resistor. A13 VREF 1.2 V Reference Input/Output. Connect this pin to VSS with a 1 µF capacitor. B1, C1 CLK+, CLK− Positive and Negative DAC Clock Inputs. B10, B11 VDD12A 1.2 V Analog Supply Voltage. C9 VBG_NEG −1.2 V Reference. Connect this pin to VNEG_N1P2 with a 0.1 µF capacitor. D2, D3, D4, D5, D8, D9, D10, D11, D12, D13, E1 VDD12_CLK 1.2 V Clock Supply Voltage. E5, E6, E8, E9, G5, G6, G7, G8, G9 DVDD 1.2 V Digital Supply Voltage. F1, F2 SYSREF+, SYSREF− System Reference Positive and Negative Inputs. These pins are self biased for ac coupling. They can be ac-coupled or dc-coupled. |
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