AD9161BBCZ datasheet(3/144 Pages) AD

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Data Sheet

AD9161/AD9162

Rev. D | Page 3 of 144

REVISION HISTORY

5/2019—Rev. C to Rev. D

Changes to INPUTS (SDIO, SCLK, CS, RESET, TX_ENABLE)

Parameters, Table 4 ...........................................................................8

Changes to Table 11 ........................................................................13

Change to Figure 30 Caption.........................................................22

Change to Transport Layer Testing Section.................................61

Changes to Data Format Section...................................................65

Deleted Table 38; Renumbered Sequentially...............................70

Changes to Changing the Main NCO Frequency Section.........70

Changes to Peak DAC Output Power Capability Section..........80

Changes to Table 42 ........................................................................83

Change to Register 0x280 Value Column, Table 43....................84

Changes to Table 45 ........................................................................86

Changes to Table 46 ........................................................................93

Updated Outline Dimensions......................................................143

7/2017—Rev. B to Rev. C

Changes to Thermal Management Section and Thermal

Resistance Section ...........................................................................13

Changes to Table 46 ........................................................................89

Changes to Table 47 ......................................................................134

4/2017—Rev. A to Rev. B

Change to OUTPUT ± to VNEG_NIP2 Parameter, Table 11........13

Changes to Figure 153 ....................................................................53

Changes to Link Delay Setup Examples, with Known Delays

Section ..............................................................................................55

Changes to Link Delay Setup Examples, without Known Delays

Section ..............................................................................................56

Changes to Table 31 ........................................................................61

Added Datapath PRBS Section......................................................71

Added Datapath PRBS IRQ Section .............................................72

Changes to Equivalent DAC Output and Transfer Function

Section ..............................................................................................80

Changes to Output Stage Configuration Section........................81

Change to Register 0x230, Table 47 ............................................101

9/2016—Rev. 0 to Rev. A

Changes to Table 1 ............................................................................3

Change to AC Specifications Section ...........................................10

Added Reflow Profile Section, Thermal Management Section,

and Figure 3, Renumbered Sequentially ......................................12

Changes to Figure 80 ......................................................................30

Changes to Link Delay Setup Example, With Known Delays

Section ..............................................................................................54

Changes to Table 25 ........................................................................57

Moved Figure 188............................................................................77

Added Temperature Sensor Section .............................................78

Changes to Table 46 ........................................................................87

Changes to Table 47 ........................................................................99

Changes to Ordering Guide.........................................................139

5/2016—Revision 0: Initial Version

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