 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
AD9161BBCZ датащи(PDF) 86 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9161BBCZ датащи(HTML) 86 Page - Analog Devices |
|
|
86 / 144 page  AD9161/AD9162 Data Sheet Rev. D | Page 86 of 144 Reg. Name Bits Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset RW 0x250 EQ_CONFIG_PHY_ 0_1 [7:0] SPI_EQ_CONFIG1 SPI_EQ_CONFIG0 0x88 R/W 0x251 EQ_CONFIG_PHY_ 2_3 [7:0] SPI_EQ_CONFIG3 SPI_EQ_CONFIG2 0x88 R/W 0x252 EQ_CONFIG_PHY_ 4_5 [7:0] SPI_EQ_CONFIG5 SPI_EQ_CONFIG4 0x88 R/W 0x253 EQ_CONFIG_PHY_ 6_7 [7:0] SPI_EQ_CONFIG7 SPI_EQ_CONFIG6 0x88 R/W 0x268 EQ_BIAS_REG [7:0] EQ_POWER_MODE RESERVED 0x62 R/W 0x280 SYNTH_ENABLE_ CNTRL [7:0] RESERVED SPI_RECAL_ SYNTH RESERVED SPI_ENABLE_ SYNTH 0x00 R/W 0x281 PLL_STATUS [7:0] RESERVED SPI_CP_ OVER_ RANGE_ HIGH_RB SPI_CP_ OVER_ RANGE_ LOW_RB SPI_CP_ CAL_VALID_ RB RESERVED SPI_PLL_LOCK_RB 0x00 R 0x289 REF_CLK_ DIVIDER_LDO [7:0] RESERVED SERDES_PLL_DIV_FACTOR 0x04 R/W 0x2A7 TERM_BLK1_ CTRLREG0 [7:0] RESERVED SPI_I_TUNE_R_ CAL_TERMBLK1 0x00 R/W 0x2A8 TERM_BLK1_ CTRLREG1 [7:0] SPI_I_SERIALIZER_RTRIM_TERMBLK1 0x00 R/W 0x2AC TERM_BLK1_RD_ REG0 [7:0] RESERVED SPI_O_RCAL_CODE_TERMBLK1 0x00 R 0x2AE TERM_BLK2_ CTRLREG0 [7:0] RESERVED SPI_I_TUNE_R_ CAL_TERMBLK2 0x00 R/W 0x2AF TERM_BLK2_ CTRLREG1 [7:0] SPI_I_SERIALIZER_RTRIM_TERMBLK2 0x00 R/W 0x2B3 TERM_BLK2_RD_ REG0 [7:0] RESERVED SPI_O_RCAL_CODE_TERMBLK2 0x00 R 0x2BB TERM_OFFSET_0 [7:0] RESERVED TERM_OFFSET_0 0x00 R/W 0x2BC TERM_OFFSET_1 [7:0] RESERVED TERM_OFFSET_1 0x00 R/W 0x2BD TERM_OFFSET_2 [7:0] RESERVED TERM_OFFSET_2 0x00 R/W 0x2BE TERM_OFFSET_3 [7:0] RESERVED TERM_OFFSET_3 0x00 R/W 0x2BF TERM_OFFSET_4 [7:0] RESERVED TERM_OFFSET_4 0x00 R/W 0x2C0 TERM_OFFSET_5 [7:0] RESERVED TERM_OFFSET_5 0x00 R/W 0x2C1 TERM_OFFSET_6 [7:0] RESERVED TERM_OFFSET_6 0x00 R/W 0x2C2 TERM_OFFSET_7 [7:0] RESERVED TERM_OFFSET_7 0x00 R/W 0x300 GENERAL_JRX_ CTRL_0 [7:0] RESERVED CHECKSUM_ MODE RESERVED LINK_EN 0x00 R/W 0x302 DYN_LINK_ LATENCY_0 [7:0] RESERVED DYN_LINK_LATENCY_0 0x00 R 0x304 LMFC_DELAY_0 [7:0] RESERVED LMFC_DELAY_0 0x00 R/W 0x306 LMFC_VAR_0 [7:0] RESERVED LMFC_VAR_0 0x1F R/W 0x308 XBAR_LN_0_1 [7:0] RESERVED SRC_LANE1 SRC_LANE0 0x08 R/W 0x309 XBAR_LN_2_3 [7:0] RESERVED SRC_LANE3 SRC_LANE2 0x1A R/W 0x30A XBAR_LN_4_5 [7:0] RESERVED SRC_LANE5 SRC_LANE4 0x2C R/W 0x30B XBAR_LN_6_7 [7:0] RESERVED SRC_LANE7 SRC_LANE6 0x3E R/W 0x30C FIFO_STATUS_ REG_0 [7:0] LANE_FIFO_FULL 0x00 R 0x30D FIFO_STATUS_ REG_1 [7:0] LANE_FIFO_EMPTY 0x00 R 0x311 SYNC_GEN_0 [7:0] RESERVED EOMF_MASK_0 RESERVED EOF_MASK_0 0x00 R/W 0x312 SYNC_GEN_1 [7:0] SYNC_ERR_DUR SYNC_SYNCREQ_DUR 0x00 R/W 0x313 SYNC_GEN_3 [7:0] LMFC_PERIOD 0x00 R 0x315 PHY_PRBS_TEST_ EN [7:0] PHY_TEST_EN 0x00 R/W 0x316 PHY_PRBS_TEST_ CTRL [7:0] RESERVED PHY_SRC_ERR_CNT PHY_PRBS_PAT_SEL PHY_TEST_ START PHY_TEST_RESET 0x00 R/W |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
