PC8374L datasheet(94/239 Pages) NSC

94 / 239 page

4.0 System Wake-Up Control (SWC) (Continued)

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Revision1.1

4.3.5

Special LED Control Register (XLEDCTL)

This register configures the Special LED Control of the two LEDs connected to pins GRN_LED and YLW_LED of the

PC8374L device. It is reset to 00h.

Power Well: VDD3

Location:

Offset 02h, when LED_OPT = 10 in SWC_CTL register

Type:

R/W or RO

Bit

Name

Reserved

SLP_S1

SW_CTL

Reset

Bit

Description

7-2

Reserved.

SLP_S1 (Sleep State S1 Select). When set to 1 by the software, indicates that the system will enter an S1

sleep state. The value of this bit controls the operation mode of GRN_LED and YLW_LED, as shown in Table 39.

0: System in working state (S0), or in S3-S5 sleep states (default)

1: System in S1 sleep state

SW_CTL (Software LEDs Control). Controls the operation mode of GRN_LED and YLW_LED, as shown in

Table 39.

0: Normal (default)

1: Bit set by software

Table 39. Special control of the GRN_LED and YLW_LED

System State

SLP_S5

SLP_S3

SLP_S1

Bit

PWRGD_PS

SW_CTL

Bit

GRN_LED

YLW_LED

Soft Off (S5)

1. In this table, X is either logic “1” or logic “0”.

XXX

Sleep State S3

Blink2

2. Blink rate is 1 Hz with a duty cycle of 50%.

Sleep State S1

Working (S0),

Power not good

Blink

Working (S0), Power

good, no SW_CTL

0100

TRI-STATE

Working (S0), Power

good, and SW_CTL

TRI-STATE

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