PC8374L datasheet(53/239 Pages) NSC

53 / 239 page

3.0 Device Architecture and Configuration (Continued)

Revision 1.1

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3.7.2

Memory Base Address Register 1 (MEMADR1)

Power Well: VDD3

Location:

Index 12h

Type:

R/W or RO

3.7.3

Memory Base Address Register 2 (MEMADR2)

Power Well: VDD3

Location:

Index 13h

Type:

R/W or RO

3.7.4

SuperI/O ID Register (SID)

This register contains the identity number of the device family. The PC8374L family is identified by the value F1.

Power Well: VSB3

Location:

Index 20h

Type:

Bit

76543210

Name

Memory Base Address 1

Reset

Bit

Description

7-0

Memory Base Address 1. This register indicates selected Memory Base address bits 23-16.

Bit

76543210

Name

TYPESEL

MEMFWHID

Memory Base Address 2

Reset

00000000

Bit

Description

TYPESEL (Transaction Type Select). Selects the transaction type decoded for memory addresses. For

address decoding of the Memory Base address, bit 31 value is 1 regardless of TYPESEL value, thus limiting

the Memory Base Address to high 2G memory space.

0: Transactions type is LPC Memory Read/Write (default)

1: Transactions type is LPC FWH Memory Read/Write

6-3

MEMFWHID (Memory FWH ID).

• When TYPESEL is 0: Indicates selected Memory Base address bits 30-27.

• When TYPESEL is 1: indicates the IDSEL of the Firmware Memory transactions to which the PC8374L re-

sponds. The least signiﬁcant bit of this ﬁeld is also used as Memory Base address bit 27.

2-0

Memory Base Address 2. Indicates selected Memory Base address bits 26-24.

Bit

76543210

Name

Family ID

Reset

Bit

Description

−0 Family ID. Identifies a family of devices with similar functionality but with different implemented options.

Winbond Electronics Corp. Advanced PC Product Center

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