P5021 datasheet(128/155 Pages) NXP

128 / 155 page

P5021 QorIQ Integrated Processor Data Sheet, Rev. 1

Electrical characteristics

Freescale Semiconductor

128

2.20.8.2.1

SGMII transmit AC timing specifications

This table provides the SGMII transmit AC timing specifications. A source synchronous clock is not supported. The AC timing

specifications do not include RefClk jitter.

2.20.8.2.2

SGMII AC measurement details

Transmitter and receiver AC characteristics are measured at the transmitter outputs (SD_TXn and SD_TXn) or at the receiver

inputs (SD_RXn and SD_RXn) respectively, as depicted in this figure.

Figure 48. SGMII AC test/measurement load

2.20.8.2.3

SGMII receiver AC timing specification

This table provides the SGMII receiver AC timing specifications. The AC timing specifications do not include RefClk jitter.

Source synchronous clocking is not supported. Clock is recovered from the data.

Table 92. SGMII transmit AC timing specifications

For recommended operating conditions, see Table 3.

Parameter

Symbol

Min

Typ

Max

Unit

Notes

Deterministic jitter

—

0.17

UI p-p

—

Total jitter

—

0.35

UI p-p

Unit Interval: 1.25 GBaud

800 – 100 ppm

800

800 + 100 ppm

—

Unit Interval: 3.125 GBaud

320 – 100 ppm

320

320 + 100 ppm

—

AC coupling capacitor

CTX

—

200

Notes:

1. See Figure 44 for single frequency sinusoidal jitter measurements.

2. The external AC coupling capacitor is required. It is recommended that it be placed near the device transmitter outputs.

Table 93. SGMII receive AC timing specifications

For recommended operating conditions, see Table 3.

Parameter

Symbol

Min

Typ

Max

Unit

Notes

Deterministic jitter tolerance

0.37

—

UI p-p

1, 2

Combined deterministic and random jitter tolerance

JDR

0.55

—

UI p-p

1, 2

Total jitter tolerance

0.65

—

UI p-p

1,2, 3

Transmitter

silicon

+ package

C = CTX

R = 50

D+ package pin

D– package pin

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