P5021 datasheet(18/155 Pages) NXP

18 / 155 page

P5021 QorIQ Integrated Processor Data Sheet, Rev. 1

Pin assignments and reset states

Freescale Semiconductor

LAD11

Muxed Data/Address

G22

I/O

BVDD

LAD12

Muxed Data/Address

F19

I/O

BVDD

LAD13

Muxed Data/Address

J18

I/O

BVDD

LAD14

Muxed Data/Address

K18

I/O

BVDD

LAD15

Muxed Data/Address

J17

I/O

BVDD

LAD16

Muxed Data/Address

J25

I/O

BVDD

LAD17

Muxed Data/Address

G25

I/O

BVDD

LAD18

Muxed Data/Address

H23

I/O

BVDD

3,35

LAD19

Muxed Data/Address

F22

I/O

BVDD

3,35

LAD20

Muxed Data/Address

H22

I/O

BVDD

3,35

LAD21

Muxed Data/Address

E21

I/O

BVDD

3,35

LAD22

Muxed Data/Address

F21

I/O

BVDD

3,35

LAD23

Muxed Data/Address

H21

I/O

BVDD

LAD24

Muxed Data/Address

K21

I/O

BVDD

LAD25

Muxed Data/Address

G20

I/O

BVDD

3,35

LAD26

Muxed Data/Address

J20

I/O

BVDD

LAD27

Muxed Data/Address

D26

I/O

BVDD

—

LAD28

Muxed Data/Address

E18

I/O

BVDD

—

LAD29

Muxed Data/Address

F18

I/O

BVDD

—

LAD30

Muxed Data/Address

J15

I/O

BVDD

—

LAD31

Muxed Data/Address

F17

I/O

BVDD

—

LDP0

Data Parity

J24

I/O

BVDD

—

LDP1

Data Parity

K23

I/O

BVDD

—

LDP2

Data Parity

H17

I/O

BVDD

—

LDP3

Data Parity

H16

I/O

BVDD

—

LA27

Address

K20

BVDD

—

LA28

Address

G19

BVDD

LA29

Address

H19

BVDD

LA30

Address

J19

BVDD

LA31

Address

G18

BVDD

LCS0

Chip Selects

D19

BVDD

LCS1

Chip Selects

D20

BVDD

LCS2

Chip Selects

E20

BVDD

LCS3

Chip Selects

D21

BVDD

Table 1. Pins listed by bus (continued)

Signal

Signal description

Package

pin number

type

Power

supply

Notes

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