P5021 datasheet(63/155 Pages) NXP

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Electrical characteristics

P5021 QorIQ Integrated Processor Data Sheet, Rev. 1

Freescale Semiconductor

2.6

Input clocks

This section discusses the system clock timing specifications for DC and AC power, spread spectrum sources, real time clock

timing, and dTSEC gigabit Ethernet reference clocks AC timing.

2.6.1

System clock (SYSCLK) timing specifications

This table provides the system clock (SYSCLK) DC specifications.

Junction to board

—

RΘJB

°C/W

Junction to case top

—

RΘJCtop

0.44

°C/W

Junction to lid top

—

RΘJClid

0.17

°C/W

Notes:

1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance.

2. Junction-to-board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification for

the specified package.

3. Junction-to-case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is used

for the case temperature. Reported value includes the thermal resistance of the interface layer.

4. Junction-to-Lid-Top thermal resistance determined using the using MIL-STD 883 Method 1012.1. However, instead of the cold

plate, the lid top temperature is used here for the reference case temperature. The reported value does not include the thermal

resistance of the interface layer between the package and cold plate.

5. Junction-to-lid-top thermal resistance determined using the using MIL-STD 883 Method 1012.1. However, instead of the cold

plate, the lid top temperature is used here for the reference case temperature. Reported value does not include the thermal

resistance of the interface layer between the package and cold plate.

6. Reference Section 3.8, “Thermal management information,” for additional details.

Table 11. SYSCLK DC electrical characteristics (OVDD = 3.3 V)

For recommended operating conditions, see Table 3.

Parameter

Symbol

Min

Typical

Max

Unit

Notes

Input high voltage

VIH

2.0

—

Input low voltage

VIL

——

0.8

Input current (OVIN= 0 V or OVIN =

OVDD)

IIN

——

±40

μA2

Notes:

1. The min VILand max VIH values are based on the respective min and max OVIN values found in Table 3.

2. The symbol OVIN, in this case, represents the OVIN symbol referenced in Section 2.1.2, “Recommended operating conditions.”

Table 10. Package thermal characteristics (continued)6

Rating

Board

Symbol

Value

Unit

Notes

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