| поискавой системы для электроныых деталей |
|
P5021 датащи(PDF) 76 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
P5021 датащи(HTML) 76 Page - NXP Semiconductors |
|
76 / 155 page ![]() P5021 QorIQ Integrated Processor Data Sheet, Rev. 1 Electrical characteristics Freescale Semiconductor 76 This figure provides the AC test load for the eSPI. Figure 13. eSPI AC test load This figure represents the AC timing from Table 29 in master mode (internal clock). Note that although timing specifications generally refer to the rising edge of the clock, this figure also applies when the falling edge is the active edge. Also, note that the clock edge is selectable on eSPI. Figure 14. eSPI AC timing in master mode (Internal Clock) diagram 2.11 DUART This section describes the DC and AC electrical specifications for the DUART interface. 2.11.1 DUART DC electrical characteristics This table provides the DC electrical characteristics for the DUART interface. Table 30. DUART DC electrical characteristics (OVDD = 3.3 V) For recommended operating conditions, see Table 3. Parameter Symbol Min Max Unit Notes Input high voltage VIH 2— V 1 Input low voltage VIL —0.8 V 1 Output Z0 = 50 Ω CVDD/2 RL = 50 Ω SPICLK (output) tNIIXKH tNIKHOV Input Signals: SPIMISO1 Output Signals: SPIMOSI1 tNIIVKH tNIKHOX Output Signals: SPI_CS[0:3]1 tNIKHOV2 tNIKHOX2 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |