XRT7250 datasheet(101/463 Pages) EXAR

101 / 463 page

XRT7250

DS3/E3 FRAMER IC

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REV. 1.1.1

The local µP can determine the current state of the

AIS condition by reading bit 7 of the Rx E3 Configura-

tion and Status Register (Address = 0x11).

NOTE: For more information on the AIS Condition please

see Section 4.3.2.8.

2.3.4.6

Receive E3 Interrupt Status Register -

2 (E3, ITU-T G.751)

Bit 3 - FERF (Change in FERF Condition) Interrupt

Status

This Reset Upon Read bit will be set to '1' if the Re-

ceive E3 Framer has detected a Change in the Rx

FERF Condition, since the last time this register was

read.

This bit-field will be asserted under either of the fol-

lowing two conditions.

1. When the Receive E3 Framer first detects the

occurrence of an Rx FERF Condition (e.g., when

the FERF bit, within the last 3 or 5 consecutive

E3 frames are set to "1").

2. When the Receive E3 Framer detects the end of

the Rx FERF Condition (e.g., when the FERF bit,

within the last 3 or 5 consecutive E3 frames are

set to "0").

NOTE: For more information on the Rx FERF (Yellow

Alarm) condition, please see Section 4.3.2.9.

Bit 2 - BIP-4 (Detection of BIP-4) Error Interrupt

Status

This Reset-upon-Read bit-field will be set to "1" if the

BIP-4 Error interrupt has occurred since the last read

of this register.

The Receive E3 Framer will generate the BIP-4 Error

interrupt if it has concluded that it has received an er-

rored E3 frame, from the Far-End Terminal.

NOTE: Please see Section 4.3.6.1.7 for a more detailed dis-

cussion of this interrupt.

Bit 1 - Framing Error Interrupt Status

This Reset-upon-Read bit-field will be set to "1" if the

Framing Byte Error interrupt has occurred since the

last read of this register.

The Receive E3 Framer will generate the Framing Er-

ror interrupt if it has detected an error in the FAS (or

Framing Alignment), in an incoming E3 frame.

NOTE: Please see Section 4.3.6.1.8 for a more detailed dis-

cussion of this interrupt.

2.3.4.7

Receive E3 LAPD Control Register (E3,

ITU-T G.751)

Bit 2 - RxLAPD Enable

This Read/Write bit-field allows the user to enable or

disable the LAPD Receiver, for reception of incoming

LAPD Message frames from the Remote LAPD

Transmitter.

Writing a "1" to this bit-field enables the LAPD Re-

ceiver. Writing a "0" to this bit-field disables the LAPD

Receiver.

Bit 1 - RxLAPD (Received LAPD Message) Inter-

rupt Enable

RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Not Used

FERF

Interrupt

Status

BIP-4

Error

Interrupt

Status

Framing

Error

Interrupt

Status

Not Used

RUR

000

RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Not Used

RxLAPD

Enable

RxLAPD

Interrupt

Enable

RxLAPD

Interrupt

Enable

R/W

RUR

000

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