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TMS320DM643 датащи(PDF) 117 Page - Texas Instruments |
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TMS320DM643 датащи(HTML) 117 Page - Texas Instruments |
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117 / 160 page ![]() www.ti.com 6 3 HAS HCNTL[1:0] HR/W HSTROBE(A) HCS HD[31:0] (output) HRDY 8 9 7 2 1 2 1 15 A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS. 8 6 15 9 7 3 18 11 10 11 10 19 HAS(A) HCNTL[1:0] HR/W HSTROBE(B) HCS HD[31:0] (output) HRDY A. For correct operation, strobe the HAS signal only once per HSTROBE active cycle. B. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS. TMS320DM643 Video/Imaging Fixed-Point Digital Signal Processor SPRS269A – FEBRUARY 2005 – REVISED APRIL 2005 Figure 5-42. HPI32 Read Timing (HAS Not Used, Tied High) Figure 5-43. HPI32 Read Timing (HAS Used) DM643 Peripheral Information and Electrical Specifications 117 |
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