TMS320DM643 datasheet(37/160 Pages) TI

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TMS320DM643

Video/Imaging Fixed-Point Digital Signal Processor

SPRS269A – FEBRUARY 2005 – REVISED APRIL 2005

Table 2-4. Terminal Functions (continued)

SIGNAL

IPD/

TYPE(1)

DESCRIPTION

IPU(2)

NAME

NO.

INTER-INTEGRATED CIRCUIT 0 (I2C0)

SCL0

I/O/Z

—

I2C0 clock.

SDA0

I/O/Z

—

I2C0 data.

MULTICHANNEL BUFFERED SERIAL PORT 0 (McBSP0)

CLKR0

AE15

I/O/Z

IPD

McBSP0 receive clock (I/O/Z)

FSR0

AB16

I/O/Z

IPD

McBSP0 receive frame sync (I/O/Z)

DR0

AC16

IPD

McBSP0 receive data (I)

DX0

AE16

O/Z

IPD

McBSP0 transmit data (O/Z)

FSX0

AF16

I/O/Z

IPD

McBSP0 transmit frame sync (I/O/Z)

CLKX0

AF17

I/O/Z

IPD

McBSP0 transmit clock (I/O/Z)

ETHERNET MAC (EMAC)

HD31/MRCLK(3)

Host-port data (I/O/Z) [default] or EMAC transmit/receive or control pins (I) (O/Z)

HPI pin functions are default, see the Device Configurations section of this data

HD30/MCRS(3)

sheet. EMAC Media Independent I/F (MII) data, clocks, and control pins for

HD29/MRXER(3)

Transmit/Receive.

•

MII transmit clock (MTCLK),

HD28/MRXDV(3)

Transmit clock source from the attached PHY.

HD27/MRXD3(3)

•

MII transmit data (MTXD[3:0]),

HD26/MRXD2(3)

Transmit data nibble synchronous with transmit clock (MTCLK).

HD25/MRXD1(3)

•

MII transmit enable (MTXEN),

HD24/MRXD0(3)

This signal indicates a valid transmit data on the transmit data pins

(MTDX[3:0]).

HD22/MTCLK(3)

•

MII collision sense (MCOL)

HD21/MCOL(3)

Assertion of this signal during half-duplex operation indicates network

HD20/MTXEN(3)

O/Z

collision.

HD19/MTXD3(3)

O/Z

During full-duplex operation, transmission of new frames will not begin if this

pin is asserted.

HD18/MTXD2(3)

O/Z

•

MII carrier sense (MCRS)

HD17/MTXD1(3)

O/Z

Indicates a frame carrier signal is being received.

•

MII receive data (MRXD[3:0]),

Receive data nibble synchronous with receive clock (MRCLK).

•

MII receive clock (MRCLK),

Receive clock source from the attached PHY.

HD16/MTXD0(3)

O/Z

•

MII receive data valid (MRXDV),

This signal indicates a valid data nibble on the receive data pins

(MRDX[3:0]) and

•

MII receive error (MRXER),

Indicates reception of a coding error on the receive data.

Device Overview

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