TMS320DM643 datasheet(56/160 Pages) TI

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3.5

Multiplexed Pin Configurations

TMS320DM643

Video/Imaging Fixed-Point Digital Signal Processor

SPRS269A – FEBRUARY 2005 – REVISED APRIL 2005

Table 3-7. Device Status (DEVSTAT) Register Selection Bit Descriptions

BIT

NAME

DESCRIPTION

31:12

Reserved

Reserved. Read-only, writes have no effect.

EMAC enable bit.

Shows the status of whether EMAC peripheral is enabled or disabled (default).

MAC_EN

0 = EMAC is disabled, and the module is powered down (default).

1 = EMAC is enabled.

HPI bus width control bit.

Shows the status of whether the HPI bus operates in 32-bit mode or in 16-bit mode (default).

HPI_WIDTH

0 = HPI operates in 16-bit mode. (default).

1 = HPI operates in 32-bit mode.

9:7

Reserved

Reserved. Read-only, writes have no effect.

CLKMODE1

Clock mode select bits

Shows the status of whether the CPU clock frequency equals the input clock frequency X1 (Bypass), x6,

or x12.

Clock mode select for CPU clock frequency (CLKMODE[1:0])

00 - Bypass (x1) (default mode)

01 - x6

CLKMODE0

10 - x12

11 - Reserved

For more details on the CLKMODE pins and the PLL multiply factors, see the Clock PLL section of this

data sheet.

Device Endian mode (LEND)

Shows the status of whether the system is operating in Big Endian mode or Little Endian mode (default).

LENDIAN

0 - System is operating in Big Endian mode

1 - System is operating in Little Endian mode (default)

BOOTMODE1

Bootmode configuration bits

Shows the status of what device bootmode configuration is operational.

Bootmode [1:0]

00 - No boot (default mode)

BOOTMODE0

01 - HPI boot

10 - Reserved

11 - EMIFA boot

AECLKINSEL1

EMIFA input clock select

Shows the status of what clock mode is enabled or disabled for the EMIF.

Clock mode select for EMIFA (AECLKIN_SEL[1:0])

00 - AECLKIN (default mode)

AECLKINSEL0

01 - CPU/4 Clock Rate

10 - CPU/6 Clock Rate

11 - Reserved

Multiplexed pins are pins that are shared by more than one peripheral and are internally multiplexed.

Some of these pins are configured by software, and the others are configured by external pullup/pulldown

resistors only at reset. Those muxed pins that are configured by software should not be programmed to

switch functionalities during run-time. Those muxed pins that are configured by external pullup/pulldown

resistors are mutually exclusive; only one peripheral has primary control of the function of these pins after

reset. Table 3-8 identifies the multiplexed pins on the DM643 device; shows the default (primary) function

and the default settings after reset; and describes the pins, registers, etc. necessary to configure specific

multiplexed functions.

Device Configurations

TMS320DM643 датащи(PDF) 56 Page - Texas Instruments

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