TMS320DM643 datasheet(80/160 Pages) TI

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PLLMULT

PLLCLK

CLKMODE0

CLKMODE1

CLKIN

EMI

filter

3.3 V

00 01 10

CPU Clock

Peripheral Bus, EDMA

Clock

Timer Internal Clock

CLKOUT4, Peripheral Clock

(AUXCLK for McASP),

McBSP Internal Clock

CLKOUT6

EMIF

00 01 10

EK2RATE

(GBLCTL.[19,18])

ECLKOUT2

ECLKOUT1

PLL

x6, x12

µF 0.1 µF

AEA[20:19]

(For the PLL Options, CLKMODE Pins Setup, and PLL Clock Frequency Ranges, see the “TMS320DM643 PLL Multiply Factor

Options, Clock Frequency Ranges, and Typical Lock Time” table.)

Internal to DM643

PLLV

ECLKIN

NOTES: Place all PLL external components (C1, C2, and the EMI Filter) as close to the C6000

™ DSP device as possible. For the

best performance, TI recommends that all the PLL external components be on a single side of the board without jumpers,

switches, or components other than the ones shown.

For reduced PLL jitter, maximize the spacing between switching signals and the PLL external components (C1, C2, and

the EMI Filter).

The 3.3-V supply for the EMI filter must be from the same 3.3-V power plane supplying the I/O voltage, DVDD.

EMI filter manufacturer TDK part number ACF451832-333, -223, -153, -103. Panasonic part number EXCCET103U.

TMS320DM643

Video/Imaging Fixed-Point Digital Signal Processor

SPRS269A – FEBRUARY 2005 – REVISED APRIL 2005

Figure 5-10. External PLL Circuitry for Either PLL Multiply Modes or x1 (Bypass) Mode

DM643 Peripheral Information and Electrical Specifications

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