TMS320DM643 datasheet(51/160 Pages) TI

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TMS320DM643

Video/Imaging Fixed-Point Digital Signal Processor

SPRS269A – FEBRUARY 2005 – REVISED APRIL 2005

Reserved

R-0

Reserved

R-0

Reserved

R-0

Reserved

VP2EN

VP1EN

Reserved

I2C0EN

MCBSP1EN(1)

MCBSP0EN

MCASP0EN

R-0

R/W-0

R-0

R/W-0

R/W-1

R/W-0

Legend: R = Read only, R/W = Read/Write, -n = value after reset

(1) The DM643 device does not support the McBSP1 peripheral.

Figure 3-1. Peripheral Configuration Register (PERCFG)

[Address Location: 0x01B3F000 - 0x01B3F003]

Table 3-4. Peripheral Configuration (PERCFG) Register Selection Bit Descriptions

BIT

NAME

DESCRIPTION

31:7

Reserved

Reserved. Read-only, writes have no effect.

VP2 Enable bit.

Determines whether the VP2 peripheral is enabled or disabled.

VP2EN

0 = VP2 is disabled, the module is powered down (default).

(This feature allows power savings by disabling the peripheral when not in use.)

1 = VP2 is enabled.

VP1 Enable bit.

Determines whether the VP1 peripheral is enabled or disabled.

0 = VP1 is disabled, the module is powered down (default).

VP1EN

(This feature allows power savings by disabling the peripheral when not in use.)

1 = VP1 is enabled.

Note: For proper DM643 device operation, the MCBSP1EN bit must be set to zero (0).

Reserved

Reserved. Read-only, writes have no effect.

Inter-integrated circuit 0 (I2C0) enable bit.

Selects whether I2C0 peripheral is enabled or disabled (default).

I2C0EN

0 = I2C0 is disabled, the module is powered down (default).

1 = I2C0 is enabled.

For C64x compatibility and possible future expansion, at device reset this bit is a one (1). The DM643

device does not support the McBSP1 peripheral.

MCBSP1EN

Note: For proper DM643 device operation, this bit must be set to zero (0).

McBSP0 Enable bit.

Determines whether the McBSP0 peripheral is enabled or disabled.

0 = McBSP0 is disabled, the module is powered down.

MCBSP0EN

(This feature allows power savings by disabling the peripheral when not in use.)

1 = McBSP0 is enabled (default).

For a graphic (logic) representation of this Peripheral Configuration (PERCFG) Register selection bit and

the signal pins controlled/selected, see Figure 3-2.

Device Configurations

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