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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMS320DM643 датащи(PDF) 52 Page - Texas Instruments |
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TMS320DM643 датащи(HTML) 52 Page - Texas Instruments |
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52 / 160 page  www.ti.com 1 0 VP1 Lower Data (10 pins) VP1 (Channel A) Reserved for C64x Compatibility. McBSP1 peripheral not supported on DM643. MCBSP1EN [PERCFG.2](B) 1 0 VP1 Upper Data (10 pins) VP1 (Channel B) VP1 (Channel A) 1 0 MCASP0EN [PERCFG.0] McASP0 Data MCBSP1EN [PERCFG.2](B) MCASP0EN [PERCFG.0] VP1D[9:0] VP1D[19:12] Muxed(A) VP1D[11:10] Standalone A. Consists of: VP1D[19:12]/AXR0[7:0] B. McBSP1 peripheral not supported on DM643. For proper DM643 device operation, the MCBSP1EN bit must be set to zero. TMS320DM643 Video/Imaging Fixed-Point Digital Signal Processor SPRS269A – FEBRUARY 2005 – REVISED APRIL 2005 Table 3-4. Peripheral Configuration (PERCFG) Register Selection Bit Descriptions (continued) BIT NAME DESCRIPTION McASP0 vs. VP1 upper-data pins select bit. Selects whether the McASP0 peripheral or the VP1 upper-data pins are enabled. 0 = McASP0 is disabled; VP1 upper-data pins are enabled; and the VP1lower-data pins are dependent on the MCSBP1EN and VP1EN bits (default). 0 MCASP0EN 1 = McASP0 is enabled; VP1 upper-data pins are disabled; and the VP1 lower-data pins are dependent on the MCSBP1EN and VP1EN bits. For a graphic (logic) representation of this Peripheral Configuration (PERCFG) Register selection bit and the signal pins controlled/selected, see Figure 3-2. Figure 3-2. VP1, McBSP1, McBSP0, and McASP0 Data/Control Pin Muxing 52 Device Configurations |
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