IMX7SCEC datasheet(12/152 Pages) NXP

12 / 152 page

Modules list

i.MX 7Solo Family of Applications Processors Datasheet, Rev. 5, 07/2017

NXP Semiconductors

OCOTP_CTRL

OTP Controller

Security

The On-Chip OTP controller (OCOTP_CTRL) provides

an interface for reading, programming, and/or

overriding identification and control information stored

in on-chip fuse elements. The module supports

electrically-programmable poly fuses (eFUSEs). The

OCOTP_CTRL also provides a set of volatile

software-accessible signals that can be used for

software control of hardware elements, not requiring

non-volatility. The OCOTP_CTRL provides the primary

user-visible mechanism for interfacing with on-chip fuse

elements. Among the uses for the fuses are unique chip

identifiers, mask revision numbers, cryptographic keys,

JTAG secure mode, boot characteristics, and various

control signals, requiring permanent non-volatility.

OCRAM

On-Chip Memory

controller

Data path

The On-Chip Memory controller (OCRAM) module is

designed as an interface between system’s AXI bus

and internal (on-chip) SRAM memory module.

In i.MX 7Solo processors, the OCRAM is used for

controlling the 128 KB multimedia RAM through a 64-bit

AXI bus.

PMU

Power Management Unit

Data path

Integrated power management unit. Used to provide

power to various SoC domains.

PWM1

PWM2

PWM3

PWM4

Pulse Width Modulation

Connectivity

peripherals

The pulse-width modulator (PWM) has a 16-bit counter

and is optimized to generate sound from stored sample

audio images and it can also generate tones. It uses

16-bit resolution and a 4x16 data FIFO to generate

sound.

PXP

PiXel Processing Pipeline

Display peripherals

A high-performance pixel processor capable of 1

pixel/clock performance for combined operations, such

as color-space conversion, alpha blending,

gamma-mapping, and rotation. The PXP is enhanced

with features specifically for gray scale applications. In

addition, the PXP supports traditional pixel/frame

processing paths for still-image and video processing

applications.

QSPI

Quad SPI

Connectivity

peripherals

Quad SPI module act as an interface to external serial

flash devices. This module contains the following

features:

• Flexible sequence engine to support various flash

vendor devices

• Single pad/Dual pad/Quad pad mode of operation

• Single Data Rate/Double Data Rate mode of

operation

• Parallel Flash mode

• DMA support

• Memory mapped read access to connected flash

devices

• Multi-master access with priority and flexible and

configurable buffer for each master

Table 2. i.MX 7Solo modules list(continued)

Block Mnemonic

Block Name

Subsystem

Brief Description

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