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IMX7SCEC датащи(PDF) 42 Page - NXP Semiconductors |
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IMX7SCEC датащи(HTML) 42 Page - NXP Semiconductors |
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42 / 152 page ![]() Electrical characteristics i.MX 7Solo Family of Applications Processors Datasheet, Rev. 5, 07/2017 NXP Semiconductors 42 Table 28. Maximum input cell delay time Cell name Max Delay PAD → Y (ns) VDD=1.65 V T=125°C Process=Slow VDD=2.3 V T=125°C Process=Slow VDD=3.0 V T=125°C Process=Slow PBIDIRPUD_E33_33_NT_DR 0.9 1.5 1.4 Table 29. Output cell delay time for fixed load Parameter Simulated Cell Delay A PAD (ns) VDD = 1.65 V, T = 125°C VDD = 2.3 V, T = 125°C VDD = 3.0 V, T = 125°C DS0 DS1 SR Driver Type CL= 5 pF CL= 10 pF CL= 40 pF CL= 5 pF CL= 10 pF CL= 40 pF CL= 5 pF CL= 10 pF CL= 40 pF 00 1 1 × Slow Slew 4.9 6.0 12.5 4.8 6.1 11.9 5.4 6.7 14.6 00 0 1 × Fast Slew 3.8 4.7 11.2 3.8 5.1 12.8 4.2 5.3 13.5 01 1 2 × Slow Slew 4.1 4.8 8.2 4.2 4.9 8.8 4.5 5.3 9.1 01 0 2 × Fast Slew 2.8 3.3 6.4 2.9 3.4 7.2 3.1 3.7 7.2 10 1 4 × Slow Slew 3.6 4.1 6.0 3.7 4.1 6.4 3.9 4.4 6.6 10 0 4 × Fast Slew 2.2 2.5 4.1 2.3 2.6 4.6 2.4 2.8 4.8 11 1 6 × Slow Slew 3.6 4.0 5.5 3.6 4.0 5.9 3.8 4.3 6.2 11 0 6 × Fast Slew 2.0 2.3 3.4 2.1 2.3 3.8 2.2 2.5 3.9 Table 30. Maximum frequency of operation for input Maximum frequency (MHz) VDD = 1.8 V, CL = 50 fF VDD=2.5 V, CL =5 0 fF VDD = 3.3 V, CL = 50 fF 550 400 430 |
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