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IMX7SCEC датащи(PDF) 29 Page - NXP Semiconductors

номер детали IMX7SCEC
подробное описание детали  i.MX 7Solo Family
PDF  152 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
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IMX7SCEC датащи(HTML) 29 Page - NXP Semiconductors

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Electrical characteristics
i.MX 7Solo Family of Applications Processors Datasheet, Rev. 5, 07/2017
NXP Semiconductors
29
4.1.6.3
LPSR Mode
LPSR is considered as an extension of the SNVS mode. All the features supported in SNVS mode is also
supported in LPSR mode, including the capability of keeping DRAM device in self-refresh.
In LPSR mode, three additional power rails will remain on: VDD_LPSR_IN, NVCC_GPIO1, and
NVCC_GPIO2. These three power rails are used to supply the logic and IO pads in the LPSR domain. The
purpose of this mode is to retain the state of 16 GPIO pads, so the other components in the whole system
will have their control signal in correct state.
Among all the 16 GPIO pads, the NVCC_GPIO1 supply the power for 8 GPIO pads, and the
NVCC_GPIO2 supply the power for the other 8 GPIO pads. This allows the SoC to have some of its GPIO
working at 1.8 V while others working at 3.3 V in the LPSR mode.
When LPSR mode is not needed for the application, the VDD_LPSR can be connected to VDDA_1P8 and
NVCC_GPIO1/2 can be connected to the same power supply as NVCC_XXX for other GPIO banks.
In LPSR mode, the supported wakeup source are RTC alarm, ONOFF event, security/tamper and also the
16 GPIO pads.
4.1.6.4
RUN Mode
In RUN mode, the CPU is active and running, and the analog / digital peripheral modules inside the
processor will be enabled. In this mode, all the external power rails to the processor have to be ON and the
SoC will be able to draw as many current as listed in the Table 5 Maximum Power Requirement.
In this mode, the PMIC should allow SoC to change the voltage of power rails through I2C/SPI interface.
Typically, when the CPU is doing DVFS, it switches the VDD_ARM voltage according to Table 9.
4.1.6.5
Low Power Mode
When the CPU is not running, the processor can enter low power mode. i.MX 7Dual processor supports a
very flexible set of power mode configurations in low power mode.
Typically there are 3 low power modes used, System IDLE, Low Power IDLE and SUSPEND:
•
System IDLE—This is a mode that the CPU can automatically enter when there is no thread
running. All the peripherals can keep working and the CPU’s state is retained so the interrupt
response can be very short. The cores are able to individually enter the WAIT state.
•
Low Power IDLE—This mode is for the case when the system needs to have lower power but still
keep some of the peripherals alive. Most of the peripherals, analog modules, and PHYs are shut
off; see Table 5-5, “Low Power Mode Definition,” in the i.MX 7Solo Application Processor
Reference Manual (IMX7SRM) for details. The interrupt response in this mode is expected to be
longer than the System IDLE, but its power is much lower.
•
Suspend—This mode has the greatest power savings; all clocks, unused analog/PHYs, and
peripherals are off. The external DRAM stays in Self-Refresh mode. The exit time from this mode
is much longer.
In System IDLE and Low Power IDLE mode, the voltage on external power supplies remains the same as
in RUN mode, so the external PMIC is not aware of the state of the processor. If any low-power setting



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