IMX7SCEC datasheet(18/152 Pages) NXP

18 / 152 page

Modules list

i.MX 7Solo Family of Applications Processors Datasheet, Rev. 5, 07/2017

NXP Semiconductors

3.2

Recommended connections for unused analog interfaces

Table 5 shows the recommended connections for unused analog interfaces.

USB_OTG1_CHD_B

An external pullup resistor with value in range from 10 k

Ω to 100 kΩ should be connected

between open-drain output USB_OTG1_CHD_B and supply VDD_USB_OTG1_3P3_IN for 3.3 V

signaling. Optionally, a similarly valued pullup resistor could be connected instead between

USB_OTG1_CHD_B and an unrelated supply up to 1.8 V, but in that case the output is only valid

when both that supply and VDD_USB_OTG1_3P3_IN are powered.

TEMPSENSOR_REXT

External 100 K

Ω (1% precision) resistor connection pin

Table 4. JTAG controller interface summary

JTAG

I/O Type

On-chip Termination

JTAG_TCK

Input

47 k

Ω pull-up

JTAG_TMS

Input

47 k

Ω pull-up

JTAG_TDI

Input

47 k

Ω pull-up

JTAG_TDO

3-state output

100 k

Ω pull-up

JTAG_TRSTB

Input

47 k

Ω pull-up

JTAG_MOD

Input

100 k

Ω pull-up

Table 5. Recommended connections for unused analog interfaces

Module

Package Net Name

Recommendation

if Unused

ADC

VDDA_ADC2_1P8, VDDA_ADC2_1P8, VDDA_ADC1_1P8,

VDDA_ADC1_1P8

1.8 V

ADC2_IN3, ADC2_IN2, ADC2_IN1, ADC2_IN0, ADC1_IN0,

ADC1_IN1, ADC1_IN2, ADC1_IN3

Tie to ground

LDO

VDD_1P2_CAP

Floating if USB_HSIC is not used

MIPI

VDD_MIPI_1P0, VDDA_MIPI_1P8

Floating or tie to ground

MIPI_DSI_D0_N, MIPI_DSI_D0_P, MIPI_VREG_0P4V,

MIPI_DSI_CLK_N, MIPI_DSI_CLK_P, MIPI_DSI_D1_N,

MIPI_DSI_D1_P, MIPI_CSI_D0_N, MIPI_CSI_D0_P,

MIPI_CSI_CLK_N, MIPI_CSI_CLK_P, MIPI_CSI_D1_N,

MIPI_CSI_D1_P

No connect

PCIe

PCIE_REFCLKIN_N, PCIE_REFCLKIN_P,

PCIE_REFCLKOUT_N, PCIE_REFCLKOUT_P,

PCIE_RX_N, PCIE_RX_P, PCIE_TX_N, PCIE_TX_P

Floating

PCIE_VP,PCIE_VP_RX,PCIE_VP_TX,

PCIE_VPH,PCIE_VPH_RX,PCIE_VPH_TX, PCIE_REXT

Tie to ground

Table 3. Special signal considerations(continued)

Signal Name

Remarks

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