IMX7SCEC datasheet(31/152 Pages) NXP

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Electrical characteristics

i.MX 7Solo Family of Applications Processors Datasheet, Rev. 5, 07/2017

NXP Semiconductors

4.1.7

USB PHY Suspend current consumption

4.1.7.1

Low Power Suspend Mode

The VBUS Valid comparators and their associated bandgap circuits are enabled by default. Table 16

shows the USB interface current consumption in Suspend mode with default settings.

4.1.7.2

4.1.7.2 Power-Down modes

Table 17 shows the USB interface current consumption with only the OTG block powered down.

In Power-Down mode, everything is powered down, including the USB_VBUS valid comparators and

their associated bandgap circuity in typical condition. Table 18 shows the USB interface current

consumption in Power-Down mode.

The system design must comply with power-up sequence, power-down sequence, and steady state

guidelines as described in this section to guarantee the reliable operation of the device. Any deviation

from these sequences may result in the following situations:

•

Excessive current during power-up phase

•

Prevention of the device from booting

•

Irreversible damage to the processor (worst-case scenario)

Table 16. USB PHY current consumption with default settings1

1 Low Power Suspend is enabled by setting USBx_PORTSC1 [PHCD]=1 [Clock Disable (PLPSCD)].

VDD_USB_OTG1_3P3_IN

VDD_USB_OTG2_3P3_IN

Current

790 uA

Table 17. USB PHY current consumption with

VBUS Valid Comparators disabled1

1 VBUS Valid comparators can be disabled through software by setting USBNC_OTG*_PHY_CFG2[OTGDISABLE0] to 1. This

signal powers down only the VBUS Valid comparator, and does not control power to the Session Valid Comparator, ADP Probe

and Sense comparators, or the ID detection circuitry.

VDD_USB_OTG1_3P3_IN

VDD_USB_OTG2_3P3_IN

Current

730 uA

Table 18. USB PHY current consumption in Power-Down mode1

1 The VBUS Valid Comparators and their associated bandgap circuits can be disabled through software by setting

USBNC_OTG*_PHY_CFG2[OTGDISABLE0] to 1 and USBNC_OTG*_PHY_CFG2[DRVVBUS0] to 0, respectively.

VDD_USB_OTG1_3P3_IN

VDD_USB_OTG2_3P3_IN

Current

200 uA

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