LAN9220 datasheet(12/142 Pages) MICROCHIP

12 / 142 page

LAN9220

DS00002417A-page 12

 2006-2017 Microchip Technology Inc.

Auto-MDIX Enable

AMDIX_EN

VIS

(PU)

Enables Auto-MDIX. Pull high or leave

unconnected to enable Auto-MDIX, pull low to

disable Auto-MDIX.

Note:

When

operating

reduced

VDDVARIO voltage levels (less than

3.0V), this pin must be pulled to a

valid level with an external resistor.

Refer to Section 2.2, "External Pull-

Up/Pull-Down Resistors" for more

information.

Test

TEST

VIS

(PD)

Reserved for internal test purposes only.

Note:

When

operating

reduced

VDDVARIO voltage (less than 3.0V),

this pin must be connected to ground

or pulled-low with an external resis-

tor. When VDDVARIO = 3.3V, this

pin may be left unconnected. Refer

Section

2.2,

"External

Pull-

Up/Pull-Down Resistors" for more

information.

General Purpose

I/O data,

nLED1 (Speed

Indicator),

nLED2 (Link &

Activity Indicator),

nLED3 (Full-

Duplex

Indicator).

GPIO[2:0]/

nLED[3:1]

VIS/

VO12/

VOD12

General Purpose I/O data: These three

general-purpose signals are fully programmable

as either push-pull output, open-drain output or

input by writing the GPIO_CFG configuration

as GP LED connections.

GPIO signals are Schmitt-triggered inputs.

When configured as LED outputs these signals

are open-drain.

nLED1 (Speed Indicator). This signal is driven

low when the operating speed is 100Mb. During

auto-negotiation, when the cable is

disconnected, and during 10Mbs operation, this

signal is driven high.

nLED2 (Link & Activity Indicator). This signal

is driven low (LED on) when the LAN9220

detects a valid link. This signal is pulsed high

(LED off) for 80mS whenever transmit or

receive activity is detected. This signal is then

driven low again for a minimum of 80mS, after

which time it will repeat the process if TX or RX

activity is detected. Effectively, LED2 is

activated solid for a link. When transmit or

receive activity is sensed LED2 will flash as an

activity indicator.

nLED3 (Full-Duplex Indicator). This signal is

driven low when the link is operating in full-

duplex mode.

Variable Voltage

I/O Power

VDDVARIO

Variable Voltage I/O logic power supply pins.

Refer to Section 7.2, "Operating Conditions**,"

on page 126 for additional details.

Common Ground

VSS

1 pad

Common Ground

TABLE 2-4:

SYSTEM AND POWER SIGNALS (CONTINUED)

Name

Symbol

Buffer

Type

# Pins

Description

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