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LAN9220 датащи(PDF) 97 Page - Microchip Technology |
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LAN9220 датащи(HTML) 97 Page - Microchip Technology |
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97 / 142 page ![]() 2006-2017 Microchip Technology Inc. DS00002417A-page 97 LAN9220 Table 5-7 below illustrates the byte ordering of the ADDRL and ADDRH registers with respect to the reception of the Ethernet physical address. Also shown is the correlation between the EEPROM addresses and ADDRL and ADDRH registers. As an example, if the desired Ethernet physical address is 12-34-56-78-9A-BC, the ADDRL and ADDRH registers would be programmed as shown in Table 5-2. The values required to automatically load this configuration from the EEPROM are also shown. TABLE 5-7: ADDRL, ADDRH AND EEPROM BYTE ORDERING EEPROM Address ADDRn Order of Reception on Ethernet 0x01 ADDRL[7:0] 1st 0x02 ADDRL[15:8] 2nd 0x03 ADDRL[23:16] 3rd 0x04 ADDRL[31:24] 4th 0x05 ADDRH[7:0] 5th 0x06 ADDRH[15:8] 6th FIGURE 5-2: Example ADDRL, ADDRH and EEPROM Setup Note: By convention, the left most byte of the Ethernet address (in this example 0x12) is the most significant byte and is transmitted/received first. 0x12 0 7 0x34 8 15 0x56 16 23 0x78 24 31 ADDRL 0x9A 0 7 0xBC 8 15 ADDRH xx 16 23 xx 24 31 0xA5 0x12 0x34 0x56 0x78 0x9A 0xBC 0x00 0x01 0x02 0x03 0x04 0x05 0x06 EEPROM |
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