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LAN9220 датащи(PDF) 83 Page - Microchip Technology

номер детали LAN9220
подробное описание детали  16-bit Non-PCI Small Form Factor 10/100 Ethernet Controller with Variable Voltage I/O & HP Auto-MDIX Support
PDF  142 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN9220 датащи(HTML) 83 Page - Microchip Technology

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 2006-2017 Microchip Technology Inc.
DS00002417A-page 83
LAN9220
5.3.15
GPT_CFG-GENERAL PURPOSE TIMER CONFIGURATION REGISTER
This register configures the General Purpose timer. The GP Timer can be configured to generate host interrupts at inter-
vals defined in this register.
4:3
GPO Data 3-4 (GPODn). The value written is reflected on GPOn.
GPO3 – bit 3
GPO4 – bit 4
R/W
00
2:0
GPIO Data 0-2 (GPIODn). When enabled as an output, the value written is
reflected on GPIOn. When read, GPIOn reflects the current state of the
corresponding GPIO pin.
GPIO0 – bit 0
GPIO1 – bit 1
GPIO2 – bit 2
R/W
000
TABLE 5-4:
EEPROM ENABLE BIT DEFINITIONS
[22]
[21]
[20]
EEDIO Function
EECLK Function
0
0
0
EEDIO
EECLK
0
0
1
GPO3
GPO4
0
1
0
Reserved
0
1
1
GPO3
RX_DV
1
0
0
Reserved
1
0
1
TX_EN
GPO4
1
1
0
TX_EN
RX_DV
11
1
TX_CLK
RX_CLK
Offset:
8Ch
Size:
32 bits
Bits
Description
Type
Default
31-30
Reserved
RO
-
29
GP Timer Enable (TIMER_EN). When a one is written to this bit the GP
Timer is put into the run state. When cleared, the GP Timer is halted. On
the 1 to 0 transition of this bit the GPT_LOAD field will be preset to FFFFh.
R/W
0
28-16
Reserved
RO
-
15-0
General Purpose Timer Pre-Load (GPT_LOAD). This value is pre-loaded
into the GP-Timer.
R/W
FFFFh
Bits
Description
Type
Default



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