LAN9220 datasheet(63/142 Pages) MICROCHIP

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DS00002417A-page 63

LAN9220

Writing register 4 bits [8:5] allows software control of the capabilities advertised by the PHY. Writing register 4 does not

automatically re-start auto-negotiation. Register 0, bit 9 must be set before the new abilities will be advertised. Auto-

negotiation can also be disabled via software by clearing register 0, bit 12.

The LAN9220 does not support “Next Page" capability.

4.7

Parallel Detection

If the LAN9220 is connected to a device lacking the ability to auto-negotiate (i.e. no FLPs are detected), it is able to

determine the speed of the link based on either 100M MLT-3 symbols or 10M Normal Link Pulses. In this case the link

is presumed to be half-duplex per the IEEE standard. This ability is known as “Parallel Detection. This feature ensures

inter operability with legacy link partners. If a link is formed via parallel detection, then bit 0 in register 6 is cleared to

indicate that the Link Partner is not capable of auto-negotiation. The Ethernet MAC has access to this information via

the management interface. If a fault occurs during parallel detection, bit 4 of register 6 is set.

Register 5 is used to store the Link Partner Ability information, which is coded in the received FLPs. If the Link Partner

is not auto-negotiation capable, then register 5 is updated after completion of parallel detection to reflect the speed capa-

bility of the Link Partner.

4.7.1

RE-STARTING AUTO-NEGOTIATION

Auto-negotiation can be re-started at any time by setting register 0, bit 9. Auto-negotiation will also re-start if the link is

broken at any time. A broken link is caused by signal loss. This may occur because of a cable break, or because of an

interruption in the signal transmitted by the Link Partner. Auto-negotiation resumes in an attempt to determine the new

link configuration.

If the management entity re-starts Auto-negotiation by writing to bit 9 of the control register, the LAN9220 will respond

by stopping all transmission/receiving operations. Once the break_link_timer is done, in the Auto-negotiation state-

machine (approximately 1200ms) the auto-negotiation will re-start. The Link Partner will have also dropped the link due

to lack of a received signal, so it too will resume auto-negotiation.

4.7.2

DISABLING AUTO-NEGOTIATION

Auto-negotiation can be disabled by setting register 0, bit 12 to zero. The device will then force its speed of operation

to reflect the information in register 0, bit 13 (speed) and register 0, bit 8 (duplex). The speed and duplex bits in register

0 should be ignored when auto-negotiation is enabled.

4.7.3

HALF VS. FULL-DUPLEX

Half-duplex operation relies on the CSMA/CD (Carrier Sense Multiple Access / Collision Detect) protocol to handle net-

work traffic and collisions. In this mode, the internal carrier sense signal, CRS, responds to both transmit and receive

activity. In this mode, If data is received while the PHY is transmitting, a collision results.

In full-duplex mode, the PHY is able to transmit and receive data simultaneously. In this mode, the internal CRS

responds only to receive activity. The CSMA/CD protocol does not apply and collision detection is disabled.

Table 4-2 describes the behavior of the internal CRS bit under all receive/transmit conditions. The internal CRS signal

is used to trigger bit 10 (No Carrier) of the TX Status word (See Section 3.12.4, "TX Status Format"). The CRS value,

and subsequently the No Carrier value, are invalid during any full-duplex transmission. Therefore, these signals cannot

be used as a verification method of transmitted packets when transmitting in 10/100 Mbps full-duplex modes.

TABLE 4-2:

CRS BEHAVIOR

Mode

Speed

Duplex

Activity

CRS Behavior

(Note 4-1)

Manual

10 Mbps

Half-Duplex

Transmitting

Active

Manual

10 Mbps

Half-Duplex

Receiving

Active

Manual

10 Mbps

Full-Duplex

Transmitting

Low

Manual

10 Mbps

Full-Duplex

Receiving

Active

Manual

100 Mbps

Half-Duplex

Transmitting

Active

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