PC87413 datasheet(161/257 Pages) NSC

161 / 257 page

Revision 1.2

161

www.national.com

9.0

System Wake-Up Control (SWC)

9.1

OVERVIEW

The System Wake-Up Control supports the ACPI Specification, Revision 1.0b, Feb. 2, 1999.

The SWC functional block receives external events from the system and internal events from the functional blocks of the

PC8741x device. Using these events together with the ACPI sleep state information supplied by the software or by external

signals, the SWC generates system interrupts (IRQ, SIOSMI) and Power Management signals (SIOSCI, ONCTL,

PWBTOUT). In addition, it controls two LED indicators and contains two Power Active timers and a watchdog timer.

The SWC receives the following external events:

• Sixteen V

SB-powered General-Purpose Input/Output events (GPIOE10-17 and GPIOE40-47).

• Two Modem Ring events (RI1 and RI2).

• Mouse movement and button pressing events (via MCLK and MDAT).

• Advanced key pressing events from the Keyboard (via KBCLK and KBDAT).

• Power and Sleep buttons pressing events (PWBTIN and SLBTIN).

The SWC receives the following internal events:

• RTC alarm event.

• Keyboard and Mouse interrupt event (IRQ).

• Module interrupt (IRQ) event from the Legacy functional blocks (FDC, Parallel Port and Serial Ports 1 and 2) and from

the XIRQ pin (mapped to IRQ).

• Watchdog time-out event.

• Software V

DD On and VDD Off requests.

The SWC receives sleep state information either by software (writing the ACPI, SLP_TYPx and SLP_EN bits) or via the

SLPS3 and SLPS5 pins from an external ACPI controller. In Legacy Power Button mode, the Power button can generate an

S5 sleep state.

The SWC implements three ACPI fixed register groups: PM1 Event Group (block b), PM1 Control Group (block b) and Gen-

eral-Purpose Event 1 Group. The unimplemented functions in the first two groups (block b) are supported by returning zero.

The SWC generates the system interrupts, IRQ (via SERIRQ) and SMI (via SIOSMI), based on the external and internal

events (except GPIOE events) and on the routing information written into its registers. GPIOE events, the exception, are

routed to the IRQ and SMI by the GPIO functional block. The IRQ and SMI interrupts are independent of the sleep state.

The SWC generates the Power Management signals (the ACPI interrupt—SIOSCI, the ONCTL signal for the VDD power

supply control and the PWBTOUT signal, which is used by an external ACPI controller) based on the same external and

internal events, on routing information and on the current sleep state. The ONCTL and PWBTOUT signals are enabled ac-

cording to the current sleep state, based on information written into the SWC registers. In Legacy Power Button mode,

ONCTL is controlled by the Power button external event. The ACPI-compatible SCI interrupt is independent of the current

sleep state.

Two functions bypass event routing by the sleep state mechanism and directly affect the ONCTL and PWBTOUT signals.

These are:

Power Button Override, which forces the VDD power supply off if the Power button is continuously pressed for more

than four seconds.

Crowbar, which releases the VDD Power On request if the VDD power supply refuses to turn on.

In addition, the SWC controls two LED indicators. Control is based on the current sleep state information or on the status of

the VSB and VDD power. The SWC also includes two Power Active timers that measure the time the VSB and VDD power

supplies are active (On).

Another function included in the SWC is the watchdog timer. If the watchdog is not retriggered by one of its event sources

and reaches time-out, it generates an SMI (via SIOSMI) or an SCI (via SIOSCI) interrupt. In addition, the watchdog gener-

ates a pulse at the WDO pin.

The SWC contains two Power Management registers that allow the software to disable each Legacy module and to TRI-

STATE its outputs in a centralized manner.

The SWC module is powered by the VPP plane (see Section 2.1 on page 32). However, during Power Fail state (i.e., when

only VBAT is present), the module functions (event detection, output generation and time counting) are disabled and only the

VPP-powered registers retain their data.

Figure 47 shows the simplified block diagram of the SWC functional block.

PC87413 датащи(PDF) 161 Page - National Semiconductor (TI)

PC87413 датащи(HTML) 161 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL