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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AT89LP51RB2 датащи(PDF) 41 Page - ATMEL Corporation |
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AT89LP51RB2 датащи(HTML) 41 Page - ATMEL Corporation |
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41 / 254 page  41 3722A–MICRO–10/11 AT89LP51RB2/RC2/IC2 Preliminary 6. System Clock The AT89LP51RB2/RC2 has a single system clock that is generated directly from one of three selectable clock sources: on-chip crystal oscillator A in high or low power operation, external clock source on XTAL1A, and the internal 8 MHz RC oscillator. A diagram of the clock subsys- tem is shown in Figure 6-1. The clock source is selected by the Clock Source A User Fuses as shown in Table 6-1 (See “User Configuration Fuses” on page 188). In addition to this system clock, the AT89LP51IC2 device adds a second system clock source that is selectable from on- chip low frequency crystal oscillator B in, external clock source on XTAL1B, and the internal 8 MHz RC oscillator. A diagram of this clock subsystem is shown in Figure 6-2. Clock source B is selected by the Clock Source B User Fuses as shown in Table 6-2. The choice of clock source also affects the start-up time after a POR, BOD or Power-down event (See “Reset” on page 51 or “Power-down Mode” on page 56). The AT 8 9LP51RB2/RC2/IC2 incl u de s a X1/X2 fe a t u re for comp a t i bility with AT89C51RB2/RC2/IC2. This feature determines if the oscillator source is divided by two or not to generate the system clock. The 8-bit system clock divider may be used to prescale the system clock to reduce the operating frequency. In addition a 4-bit prescaler is available to change the clocks of the peripherals. Figure 6-1. AT89LP51RB2/RC2 Clock Subsystem Diagram Figure 6-2. AT89LP51IC2 Clock Subsystem Diagram XTAL1A XTAL2A SYSTEM CLOCK (CLKSYS) INTERNAL 8.0 MHz OSC 0 1 2 3 8-BIT CLOCK DIVIDER CLKIRC CLKEXT CLKXTAL CLOCK FUSE A 4-BIT PRESCALER TPS3-0 Timer 0 Timer 1 Timer 2 PCA Watchdog ÷2 0 1 X2 (CKCON0.0) CKRL 0 1 CKRL != FFH OSCA XTAL1A XTAL2A SYSTEM CLOCK (CLKSYS) INTERNAL 8.0 MHz OSC 0 1 2 3 8-BIT CLOCK DIVIDER CLKIRC CLKEXTA CLKXTALA CLOCK FUSE A 4-BIT PRESCALER TPS3-0 Timer 0 Timer 1 Timer 2 PCA Watchdog ÷2 0 1 X2 (CKCON0.0) CKRL 0 1 CKRL != FFH OSCA XTAL1B XTAL2B 0 1 2 3 CLKIRC CLKEXTB CLKXTALB CLOCK FUSE B OSCB OscAEn (OSCON.0) OscBEn (OSCON.1) 0 1 CKS (CKSEL.0) ÷128 Timer 0 Subclock Timer 2 (EXTB or XTALB only via T2 ) |
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