910GL datasheet(253/426 Pages) INTEL

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Functional Description

Datasheet

253

Intel Dual Display Clone uses both display pipes to drive the same content, at the same resolution

and color depth to two different displays. This configuration allows for different refresh rates on

each display.

Intel Dual Display Twin uses one of the display pipes to drive the same content, at the same

resolution, color depth, and refresh rates to two different displays.

Extended Desktop (82915G only) uses both display pipes to drive different content, at potentially

different resolutions, refresh rates, and color depths to two different displays. This configuration

allows for a larger Windows Desktop by using both displays as a work surface.

Note:

The GMCH graphics engine is also incapable of operating in parallel with an external PCI

Express graphics device. The GMCH graphics engine can, however, work in conjunction with a

PCI graphics adapter.

12.8

Power Management

Power Management capabilities of the (G)MCH include the following:

• ACPI 1.0b support

• ACPI S0, S3, S4, S5, C0, C1, C2, C3, C4

• Enhanced power management state transitions for increasing time the processor spends in

low power states

• Internal Graphics Display Device Control D0, D1, D2, D3

(82915G/82915GV/82915GL/82910GL GMCH only)

• Graphics Adapter States: D0, D3.

• PCI Express Link States: L0, L0s, L1, L2/L3 Ready, L3

• Conditional memory Self-Refresh during C2, C3, and C4 states

12.9

Clocking

The (G)MCH has a total of 5 PLLs providing the internal clocks. The PLLs are:

• Host PLL – This PLL generates the main core clocks in the host clock domain. The host PLL

is used to generate memory and internal graphics core clocks. It uses the Host clock

(H_CLKIN) as a reference.

• PCI Express PLL (82915G/92915P/82915PL (G)MCH Only) – This PLL generates all PCI

Express related clocks, including the Direct Media Interface that connects to the ICH6. This

PLL uses the 100 MHz (G_CLKIN) as a reference.

• Display PLL A PLL (82915G/92915GV/82915GL/82910GL GMCH Only) – This PLL

generates the internal clocks for Display A. It uses D_REFCLKIN as a reference.

• Display PLL B (82915G/92915GV/82915GL/82910GL GMCH Only) – This PLL generates

the internal clocks for Display B. It uses D_REFCLKIN as a reference.

Figure 12-3 illustrates the various clocks in the platform.

910GL датащи(PDF) 253 Page - Intel Corporation