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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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910GL датащи(PDF) 66 Page - Intel Corporation |
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910GL датащи(HTML) 66 Page - Intel Corporation |
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66 / 426 page  Host Bridge/DRAM Controller Registers (D0:F0) R 66 Datasheet Address Offset Register Symbol Register Name Default Value Access 52–53h GGC GMCH Graphics Control Register (82915G GMCH only) 0030h R/W/L 54–57h DEVEN Device Enable 00000019h R/W 58–8Fh — Reserved — — 90h PAM0 Programmable Attribute Map 0 00h R/W 91h PAM1 Programmable Attribute Map 1 00h R/W 92h PAM2 Programmable Attribute Map 2 00h R/W 93h PAM3 Programmable Attribute Map 3 00h R/W 94h PAM4 Programmable Attribute Map 4 00h R/W 95h PAM5 Programmable Attribute Map 5 00h R/W 96h PAM6 Programmable Attribute Map 6 00h R/W 97h LAC Legacy Access Control 00h R/W 98–9Bh — Reserved — — 9Ch TOLUD Top of Low Usable DRAM 08h R/W 9Dh SMRAM System Management RAM Control 00h RO, R/W/L 9Eh ESMRAMC Extended System Management RAM Control 00h RO, R/W/L 9F–C7h — Reserved — — C8–C9h ERRSTS Error Status 0000h RO, R/W/L CA–CBh ERRCMD Error Command 0000h R/W CC–DBh — Reserved — — DC–DFh SKPD Scratchpad Data 00000000h R/W E0–E8h CAPID0 Capability Identifier 0000000000 01090009h RO E9–FFh — Reserved — — 100h C0DRB0 Channel A DRAM Rank Boundary Address 0 00h R/W 101h C0DRB1 Channel A DRAM Rank Boundary Address 1 00h R/W 102h C0DRB2 Channel A DRAM Rank Boundary Address 2 00h R/W 103h C0DRB3 Channel A DRAM Rank Boundary Address 3 00h R/W 104–107h — Reserved — — 108h C0DRA0 Channel A DRAM Rank 0,1 Attribute 00h R/W 109h C0DRA2 Channel A DRAM Rank 2,3 Attribute 00h R/W 10A–10Bh — Reserved — — 10Ch C0DCLKDIS Channel A DRAM Clock Disable 00h R/W 10Dh — Reserved — — |
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