910GL datasheet(250/426 Pages) INTEL

250 / 426 page

Functional Description

250

Datasheet

12.7.1.4

DDC (Display Data Channel)

DDC is a standard defined by VESA. Its purpose is to allow communication between the host

system and display. Both configuration and control information can be exchanged allowing plug-

and-play systems to be realized. Support for DDC 1 and 2 is implemented. The GMCH uses the

DDC_CLK and DDC_DATA signals to communicate with the analog monitor. The GMCH

generates these signals at 2.5 V. External pull-up resistors and level shifting circuitry should be

implemented on the board.

The GMCH implements a hardware GMBus controller that can be used to control these signals

allowing for transactions speeds up to 400 kHz.

12.7.2

Digital Display Interface

The GMCH has several options for driving digital displays. The GMCH contains two SDVO

ports that are multiplexed on the PCI Express* x16 Graphics Interface. When an external PCI

Express* x16 Graphics Interface graphics accelerator is not present, the GMCH can use the

multiplexed SDVO ports to provide extra digital display options. These additional digital display

capabilities may be provided through an ADD2 card that is designed to plug in to a PCI Express

connector.

12.7.2.1

Digital Display Channels – SDVOB and SDVOC

The GMCH has the capability to support digital display devices through two SDVO ports. When

an external graphics accelerator is used via the PCI Express* x16 Graphics Interface port, these

SDVO ports are not available.

The shared SDVO ports each support a pixel clock up to 200 MHz and can support a variety of

transmission devices. When using a dual-channel external transmitter, it will be possible to pair

the two SDVO ports in dual-channel mode to support a single digital display with higher

resolutions and refresh rates. In this mode, GMCH is capable of driving pixel clock up to

400 MHz.

SDVO_CTRLDATA is an open-drain signal that will act as a strap during reset to tell the GMCH

whether the interface is a PCI Express interface or an SDVO interface. When implementing

SDVO, either via ADD2 cards or with a down device, a pull-up is placed on this line to signal to

the GMCH to run in SDVO mode and for proper GMBus operation.

12.7.2.2

ADD2 Card

When a 915G Express chipset platform uses a PCI Express* x16 Graphics Interface connector,

the multiplexed SDVO ports may be used via an ADD2 card. The ADD2 card will be designed to

fit a standard PCI Express (x16) connector.

12.7.2.2.1

TMDS Capabilities

The GMCH is compliant with DVI Specification 1.0. When combined with a DVI compliant

external device and connector, the GMCH has a high speed interface to a digital display

(e.g., flat panel or digital CRT). When combining the two multiplexed SDVO ports, the GMCH

can drive a flat panel up to 2048x1536 or a dCRT/HDTV up to 1920x1080. Flat Panel is a fixed

resolution display. The GMCH supports panel fitting in the transmitter, receiver or an external

910GL датащи(PDF) 250 Page - Intel Corporation

910GL датащи(HTML) 250 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL