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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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910GL датащи(PDF) 189 Page - Intel Corporation |
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910GL датащи(HTML) 189 Page - Intel Corporation |
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189 / 426 page  Integrated Graphics Device Registers (D2:F0) (Intel® 82915G/82915GV/82915GL/ 82910GL GMCH Only) R Datasheet 189 9.1.29 PMCAP—Power Management Capabilities (D2:F0) PCI Device: 2 Address Offset: D2h Default Value: 0022h Access: RO Size: 16 bits Bit Access & Default Description 15:11 RO 00h PME Support: This field indicates the power states in which the IGD may assert PME#. Hardwired to 0 to indicate that the IGD does not assert the PME# signal. 10 RO 0b D2: The D2 power management state is not supported. This bit is hardwired to 0. 9 RO 0b D1: Hardwired to 0 to indicate that the D1 power management state is not supported. 8:6 Reserved 5 RO 1b Device Specific Initialization (DSI): Hardwired to 1 to indicate that special initialization of the IGD is required before generic class device driver is to use it. 4 RO 0b Auxiliary Power Source: Hardwired to 0. 3 RO 0b PME Clock: Hardwired to 0 to indicate IGD does not support PME# generation. 2:0 RO 010b Version: Hardwired to 010b to indicate that there are 4 bytes of power management registers implemented and that this device complies with revision 1.1 of the PCI Power Management Interface Specification |
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