MAC7200 datasheet(102/976 Pages) FREESCALE

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Disabled Mode

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

details on this). This is typically done by setting or clearing a DOZE bit in one of the peripheral’s control

registers. Only the core clocks are actually gated in DOZE mode. IPI register clocks are gated only when

no register accesses to the module are detected, thus still allowing access to the module’s DOZE bit. All

protocol clocks are running in DOZE mode in order to enable detection of wakeup events on external

interfaces.

Entering Doze mode

•

Core sets the SYSTEM_DOZE bit in the CRG

In this mode, the following components may be individually controlled:

•

Turn off the RTI clock by setting RTIDOZE

•

Turn off the SWT clock by setting SWTDOZE

•

Turn off a peripheral by setting its DOZE bit

Exiting Doze mode

Any of the following events can be used to wake the system from DOZE mode:

•

External Reset

•

Crystal Monitor Reset

•SWT Reset

•

Self Clock Mode Interrupt

•

Real Time Interrupt (RTI)

•

Any Wakeup event in the system

•

Core writes $00 to the CRG DOZE register

•

Core clears the DOZE bit in the individual peripheral (optional feature)

3.4

Disabled Mode

In this mode, the peripheral is completely disabled, typically because it is not used for the particular

application being executed. This mode is intended for static power management.

•

Controlled via the MDIS bit in each peripheral

•

Software is responsible for setting the appropriate MODE bits in the Port Integration Module

(PIM), in order to drive the correct control signals to the pad(s).

•

Core enables peripheral by clearing its MDIS bit.

•

Note that the peripheral does not finish any current transfers before shutting down.

Entering Disabled mode

•

The reset state of all peripherals is disabled (MDIS=1)

•

Software configures the appropriate pin(s) in the PIM, including setting the correct MODE bits.

•

Core sets the MDIS bit in the peripheral

Exiting Disabled mode

•

The reset state of all peripherals is disabled (MDIS=1)

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